RTL8201(L)
2002-01-18
Rev.1.04
7
6. Register Descriptions
This section will describe definitions and usage for each of the registers available in the RTL8201. The first six registers of the
MII are defined by the MII specification. Other registers are defined by Realtek Semiconductor Corp. for internal use and are
reserved for specific uses.
Register
Description
Default (h)
0
Basic Mode Control Register
3100
1
Basic Mode Status Register
7849
2
PHY Identifier 1 Register
0000
3
PHY Identifier 2 Register
8201
4
Auto-negotiation
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Register
1E1
5
Auto-negotiation Link Partner Ability Register
80
6
Auto-negotiation Expansion Register
0
6.1 Register 0 Basic Mode Control
Address
Name
Description/Usage
Default/Attribute
0:<15> Reset
Reset:
This bit sets the status and control registers of the PHY in a
default state. In order to reset the RTL8201L by software control, a ‘1’
must be written to bit 15 using an MII write operation. The bit clears
itself after the reset process is complete, and does not need to be cleared
using a second MII write. Writes to other Control register bits will have
no effect until the reset process is completed, which requires
approximately 1us. Writing a ‘0’ to this bit has no effect. Because this
bit is self clearing after a few cycles from a write operation, it will
return a ‘0’ when read.
1: Software reset
0: Normal operation
0, RW
0:<14> Loopback
Loopback:
This bit enables loopback of transmit data nibbles
TXD<3:0> to the receive data path. The RTL8201L may be placed into
loopback mode by writing a ‘1’ to bit 14. Loopback mode may be
cleared either by writing a ‘0’ to bit 14 or by resetting the chip. When
this bit is read, it will return a ‘1’ when the chip is in
software-controlled loopback mode, otherwise it will return a ‘0’.
1: Enable loopback
0: Normal operation
0, RW
0:<13> Spd_Set
Speed Set:
This bit can set the network speed. If Auto-negotiation is
enabled, this bit has no effect on speed selection. However, if
Auto-negotiation is disabled by software control, the operating speed of
the RTL8201L can be forced by writing the appropriate value to bit 13.
Writing a ‘1’ to this bit forces 100Base-X operation, while writing a ‘0’
forces 10Base-T operation. When this bit is read, it returns the value of
the software controlled forced speed selection only.
1: 100Mbps
0: 10Mbps
When 100Base-FX mode is enabled, this bit=1, and this bit is read only.
1, RW
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