Rastergraf
2-10 Specifications
2.3 Display Timing
The SM731 chip display timing is programmable. The
following tables provide the timing values provided by
Rastergraf software. Please note that the timing parameters
vary by application.
Table 2-2 BIOS Display Timing Specifications
Active
Display
Format
Bits per
Pixel
Vertical
Refresh
Horizontal
Refresh
Pixel
Clock
640 x 400
VGA
8
60 Hz
31.55 kHz
27 MHz
Table 2-3 VGA/Windows Platform Display Timing Specifications
Active
Display
VESA
Format
Bits per
Pixel
Vertical
Refresh
Horizontal
Refresh
Pixel
Clock
640 x 480
n/a
VGA
VGA
VGA
8, 16, 32
60 Hz
72 Hz
75 Hz
85 Hz
31.5 kHz
37.9 kHz
37.5 kHz
43.4 kHz
25.175 MHz
31.5 MHz
31.5 MHz
36 MHz
800 x 600
SVGA
8, 16, 32
60 Hz
72 Hz
75 Hz
85 Hz
37.9 kHz
48.1 kHz
46.9 kHz
53.7 kHz
40 MHz
50 MHz
49.5 MHz
56.25 MHz
1024 x 768
UVGA
8, 16, 32
60 Hz
70 Hz
75 Hz
85 Hz
48.4 kHz
56.5 kHz
60.0 kHz
68.7 kHz
65 MHz
75 MHz
78.75 MHz
94.5 MHz
1280 x 1024
SXGA
8, 16, 32
60 Hz
75 Hz
85 Hz
64 kHz
80 kHz
91.1 kHz
108 MHz
135 MHz
157.5 MHz
1600 x 1200
UXGA
8, 16, 24
60 Hz
70 Hz
75 Hz
85 Hz
75 kHz
87.5 kHz
93.8 kHz
106.3 kHz
162 MHz
189 MHz
202.5 MHz
229.5 MHz
Summary of Contents for Topaz
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Page 13: ...Rastergraf General Information 1 1 Chapter 1 General Information...
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Page 41: ...Rastergraf Specifications 2 1 Chapter 2 Specifications...
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Page 137: ...Rastergraf Programming On board Devices and Memories 5 5...
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Page 165: ...Rastergraf Troubleshooting 6 1 Chapter 6 Troubleshooting...