Rastergraf Topaz, User Manual

Page: 17 / 169

Rastergraf
General Information 1-5
Figure 1-2 Stratus Block Diagram
Figure 1-2 Stratu
s Block Diagram
PMC (PCI) Bus
On-Chip Display Memory
V
ideo
Output
Processor
2D/3D Drawing Engines
PCI Bus Interface
DMA Engine
V
ideo Input
Processor
235 MHz RAMDAC
NTSC/P
AL
V
ideo
Encoder
Flat Panel Drivers
Dual
Channel
LVDS
Encoder
BIOS
Memory Interface
I
2
C
Controller
PLD Controller
I/O Resource Manager
PLDfor YUV/RGB
Multiplexer
Analog Devices
AD9882 High S
peed
RGB/DVI Digitizer
Conexant Bt835
V
ideo Input Processor
THine THC63DV164 DVI Output Encoder
BIOS EEPROM
LVDS
Out
V
ideo
Out
V
ideo
In
DVI In
RGB In
Ch 1 Ch 2
Select
VGA Ch 1
Out
DVI
Out
32 bit
33/66 MHz
Silicon Motion SM731 Graphics
Accelerator
VGA Ch 2
Out
Analog Devices ADV7123 DAC
V
ideo
Input/ Output/ RGBHV
or
DVI In
Rear Panel Option
Front Panel Option
Graphics VGA Ch 1
Out
Graphics
DVI
DVI-I
Connector
VGA Ch 1
Out
VGA Ch 2
Out
DVI Out
Graphics VGA Ch 2
Out
MDSM
Connector
V
ideo
Input/ Output/ RGBHV
or
DVI In
Graphics
Dual
Channel
LVDS
Local
3.3V
Regulator
Option