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Hardware Description
36
IPMI FPGA
The
Intelligent
Platform
Management
Interface
(IPMI)
Field
Programmable
Gate
Array
(FPGA)
provides
the
specialized
interfaces
and
glue
logic
needed
between
the
H8
IPMC
and
rest
of
the
CPM.
The
IPMC
and
the
IPMI
FPGA
provide
watchdog
timers
to
help
prevent
the
CPM
from
entering
an
unrecoverable
state.
Watchdog
timer
2
on
the
IPMI
FPGA
is
enabled
by
default
and
starts
running
as
soon
as
+3_3V_SUS
power
is
present
and
the
FPGA
has
loaded
its
internal
flash
image
into
its
internal
SRAM.
If
a
firmware
or
hardware
problem
on
the
IPMC
causes
it
to
stop
strobing
the
watchdog
timer
in
the
IPMC
FPGA,
it
isolates
the
IPMC
from
the
IPMB
‐
A,
IPMB
‐
B,
and
IPMB
‐
L
buses
so
that
they
remain
functional
for
the
remaining
blades
in
the
chassis.
Watchdog
timer
2
then
resets
the
IPMC.
The
interfaces
supported
by
the
IPMC
FPGA
include
the
SPI
bus,
the
I
2
C
bus
2,
and
the
JTAG
chain.
The
IPMI
FPGA
is
programmed
via
the
same
JTAG
chain
as
is
used
for
the
CC
FPGA
and
any
programmable
devices
on
the
RTM.
Intel I350 quad GbE Ethernet controller
The
I350
has
four
independent
network
interfaces
that
support
SerDes/SGMII
or
MDI
(copper)
protocols.
The
I350
has
a
x4
PCI
Express
Gen2
host
interface
that
operates
at
5.0
GT/s
and
is
capable
of
negotiating
to
x2
and
x1
link
widths.
The
I350
provides
virtualization
support
including
PCI
‐
SIG
Single
‐
Root
I/O
Virtualization,
VMDq2
support
for
up
to
eight
virtual
machines
and
eight
TX
and
RX
queues
per
port.
The
I350
has
NC
‐
SI
and
SMBus
interfaces
that
support
pass
‐
through
traffic
for
Serial
‐
Over
‐
LAN
(SOL)
support
from
the
IPMC.
The
CPM
has
both
interfaces
connected
to
allow
flexibility
for
the
IPMI
code
development.
Initial
configuration
information
for
the
controller
(including
management
setup
and
SMBus
addresses)
is
provided
via
a
256Kb
SPI
EEPROM,
which
is
read
upon
power
‐
up.
Mellanox dual 40GbE controller
The
CPM
provides
two
40GbE
ports
using
a
Mellanox
ConnectX
‐
3
(CX3)
controller.
The
CX3
is
connected
to
a
x8
Gen
3
PCI
Express
port
that
provides
a
peak
data
bandwidth
of
64Gb/s
in
each
direction.
The
CX3
has
two
integrated
Gigabit
Ethernet
MAC/PHY
ports
that
support
the
following
standard
Ethernet
interfaces
for
CPM:
•
40GBASE
‐
KX4
(IEEE
802.3ba)
•
10GBASE
‐
KX4
(IEEE
802.3ap)
•
1000BASE
‐
KX
(IEEE
802.3ap)
The
CX3
has
a
flash
boot
interface
and
the
CPM
uses
a
32Mb
flash
device
to
store
boot
firmware
and
configuration
options
for
the
controller.
The
CX3
supports
PCI
‐
SIG
SR
‐
IOV,
providing
up
to
128
virtual
machines.
The
CX3
controller
is
used
to
connect
to
Fabric
Channels
1
and
2
on
the
Zone
2
connector.
The
TX
pairs
connect
directly
to
the
connector
while
the
RX
pairs
have
DC
blocking
caps
between
the
controller
and
the
connector.