5G Module Series
RM502Q-GL Hardware Design
RM502Q-GL_Hardware_Design 44 / 77
Host
Module
WAKE_ON_WAN#
BB
GPIO
23
VCC_IO_HOST
Note:
The voltage level on VCC_IO_HOST depends on the host side due to the open drain in pin 23.
Wake up the host
1s
H
L
R1
10k
Figure 28: WAKE_ON_WAN# Signal Reference Circuit
3.10.5. DPR*
RM502Q-GL provides a DPR (Dynamic Power Reduction) pin for body SAR (Specific Absorption Rate)
detection. The signal is sent from a host system proximity sensor to RM502Q-GL module to provide an
input trigger, which will reduce the output power in radio transmission.
Table 17: Function of the DPR Signal
Please refer to
document [2]
for more details about
AT+QCFG="sarcfg"
command.
3.10.6. STATUS*
RM502Q
-GL
provides two status indication pins for communication with IPQ807x device. Pin 38
(SDX2AP_STATUS) outputs the status indication signal to IPQ807x device, and pin 68
(AP2SDX_STATUS) inputs the status indication signal from IPQ807x device.
DPR Level
Function
High/Floating
Max transmitting power will NOT back off
Low
Max transmitting power will back off by executing
AT+QCFG="sarcfg"
command
NOTE