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5G Module Series

RM502Q-GL Hardware Design

RM502Q-GL_Hardware_Design 36 / 77

Host

Module

PCIE_REFCLK_P

PCIE_REFCLK_M

PCIE_RX_P

PCIE_RX_M

PCIE_TX_P

PCIE_TX_M

PCIE_REFCLK_P

PCIE_REFCLK_M

PCIE_RX_P

PCIE_RX_M

PCIE_TX_P

PCIE_TX_M

PCIE_CLKREQ_N

PCIE_RST_N

PCIE_WAKE_N

PCIE_CLKREQ_N

PCIE_RST_N

PCIE_WAKE_N

VCC_IO_HOST

Note:

The voltage level of VCC_IO_HOST depends on the host side due to the open drain in pins

50, 52 and 54.

C6 220nF

C5 220nF

C2 220nF

C1 220nF

100k

Figure 21: PCIe Interface Reference Circuit (EP Mode)

In order to ensure the signal integrity of PCIe interface, AC coupling capacitors C5 and C6 should be

placed close to the host on PCB. C1 and C2 have been integrated inside the module, so do not place

these two capacitors

on customers’ schematic and PCB.

Figure 22: PCIe Power-on Timing Requirements of M.2 Specification

Summary of Contents for RM502Q-GL

Page 1: ...RM502Q GL Hardware Design 5G Module Series Rev RM502Q GL_Hardware_Design_V1 0 Date 2020 07 06 Status Preliminary www quectel com ...

Page 2: ...RMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITH...

Page 3: ...5G Module Series RM502Q GL Hardware Design RM502Q GL_Hardware_Design 2 77 About the Document Revision History Version Date Author Description 1 0 2020 07 06 Kingson ZHANG Qiqi WANG Initial ...

Page 4: ...n and off Scenarios 23 3 4 1 Turn on the Module 23 3 4 1 1 Turn on the Module with a Host GPIO 24 3 4 1 2 Turn on the Module Automatically 24 3 4 1 3 Turn on the Module with Compatible Design 25 3 4 2 Turn off the Module 26 3 4 2 1 Turn off the Module through FULL_CARD_POWER_OFF 26 3 4 2 2 Turn off the Module through AT Command 26 3 5 Reset 28 3 6 U SIM Interfaces 30 3 7 USB Interface 32 3 8 PCIe ...

Page 5: ...onnectors 55 5 4 1 RF Bands Supported by Antenna Connectors 56 5 5 Antenna Installation 57 5 5 1 Antenna Requirements 57 5 5 2 Recommended RF Connector for Antenna Installation 57 6 Electrical Reliability and Radio Characteristics 60 6 1 Absolute Maximum Ratings 60 6 2 Power Supply Requirements 60 6 3 I O Requirements 61 6 4 Operation and Storage Temperatures 61 6 5 Current Consumption 62 6 6 RF O...

Page 6: ... of the DPR Signal 44 Table 18 Pin Definition of COEX Interface 45 Table 20 Pin Definition of Antenna Tuner Control Interface 45 Table 21 Definition of Configuration Pins 46 Table 22 Configuration Pins List of M 2 Specification 46 Table 23 GNSS Performance 48 Table 24 Pin Definition of RF Antenna Interfaces 49 Table 25 RM502Q GL RF Antenna Mapping 50 Table 26 RM502Q GL Module Operating Frequencies...

Page 7: ...igure 20 Reference Circuit of USB 3 1 2 0 Interface 33 Figure 21 PCIe Interface Reference Circuit EP Mode 36 Figure 22 PCIe Power on Timing Requirements of M 2 Specification 36 Figure 23 PCIe Power on Timing Requirements of the Module 37 Figure 24 Primary Mode Timing 39 Figure 25 Auxiliary Mode Timing 39 Figure 26 W_DISABLE1 and W_DISABLE2 Reference Circuit 42 Figure 27 WWAN_LED Reference Circuit ...

Page 8: ...5G Module Series RM502Q GL Hardware Design RM502Q GL_Hardware_Design 7 77 Figure 42 Top and Bottom Views of the Module 74 Figure 43 Tray Size Unit mm 75 Figure 44 Tray Packaging Procedure 75 ...

Page 9: ...tomers applications This document helps customers quickly understand the interface specifications electrical and mechanical details as well as other related information of RM502Q GL module To facilitate its application in different fields reference design is also provided for reference Associated with application notes and user guides customers can use the module to design and set up mobile applic...

Page 10: ...onsult the airline staff for more restrictions on the use of wireless devices on boarding the aircraft Wireless devices may cause interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Cellular terminals or mobiles operating over radio signals and cellular network cannot be guarantee...

Page 11: ... such as Windows Linux and Android and also provides GNSS and voice functionality to meet specific application demands The following table shows the frequency bands and GNSS type of RM502Q GL module Table 1 Frequency Bands and GNSS Type of RM502Q GL Module LTE FDD B29 B32 and LTE TDD B46 support receving only Mode RM502Q GL 5G NR n1 n2 n3 n5 n7 n8 n12 n20 n25 n28 n38 n40 n41 n48 n66 n71 n77 n78 LT...

Page 12: ...E bands Class 3 23 dBm 2 dB for 5G NR bands Class 2 26 dBm 2 dB for LTE B38 B40 B41 B42 B43 bands HPUE 1 Class 2 26 dBm 2 3 dB for 5G NR n41 n77 n78 bands HPUE 1 5G NR Features Support 3GPP Rel 15 Support uplink 256QAM and downlink 256QAM Support downlink 4 4 MIMO on n1 n2 n3 n7 25 n38 n40 n41 n48 n66 n77 n78 Support uplink 2 2 UL MIMO on n41 n77 n78 Support SCS 15 kHz and 30 kHz Support SA and NS...

Page 13: ...for AT command communication data transmission firmware upgrade software debugging GNSS NMEA sentence output and voice over USB Support USB serial drivers for Windows 7 8 8 1 10 Linux 2 6 5 4 Android 4 x 5 x 6 x 7 x 8 x 9 x 10 PCIe 1 Interface Complaint with PCIe GEN3 support 8 Gbps per lane PCIe 1 Used for AT command communication data transmission firmware upgrade software debugging GNSS NMEA se...

Page 14: ...n value exceeding the specified tolerances of 3GPP When the temperature returns to the normal operating temperature level the module will meet 3GPP specifications again 4 means under development 2 3 Functional Diagram The following figure shows a block diagram of RM502Q GL Baseband PMIC Sub 6 GHz Transceiver ANT0 ANT3 ANT2_GNSSL1 ET VCC RESET_N 38 4M XO SPMI IQ Control Tx PRx DRx PCI Express M 2 K...

Page 15: ...on Board To help with the development of applications conveniently with RM502Q GL Quectel supplies the evaluation board PCIe Card EVB a USB to RS 232 converter cable a USB type C cable antennas and other peripherals to control or test the module For more details please refer to document 1 ...

Page 16: ... comply with PCI Express M 2 specification This chapter mainly describes the definition and application of the following interfaces pins of RM502Q GL Power supply U SIM interfaces USB interface PCIe interface PCM interface Control and indication interfaces COEX UART interface Antenna tuner control interface Configuration pins means under development NOTE ...

Page 17: ...D 39 USB_SS_RX_P 37 USB_SS_RX_M 35 GND 33 USB_SS_TX_P 31 USB_SS_TX_M 29 GND 27 DPR 25 WAKE_ON_WAN 23 CONFIG_0 21 Notch Notch Notch Notch GND 11 USB_DM 9 USB_DP 7 GND 5 GND 3 CONFIG_3 1 PIN11 PIN10 No Pin Name 74 VCC 72 VCC 70 VCC 68 AP2SDX_STATUS 66 USIM1_DET 64 COEX_TXD 62 COEX_RXD 60 WLAN_TX_EN 58 RFFE1_DATA 56 RFFE1_CLK 54 PCIE_WAKE_N 52 PCIE_CLKREQ_N 50 PCIE_RST_N 48 USIM2_VDD 46 USIM2_RST 44 ...

Page 18: ... shows the pin definition and description of RM502Q GL Table 4 Pin Description Pin No M 2 Socket 2 PCIe based Pinout RM502Q GL Pin Name I O Description Comment 1 CONFIG_3 CONFIG_3 DO Not connected internally 2 3 3 V VCC PI Power supply Vmin 3 135 V Vnorm 3 7 V Vmax 4 4 V 3 GND GND Ground 4 3 3 V VCC PI Power supply Vmin 3 135 V Vnorm 3 7 V Vmax 4 4 V 5 GND GND Ground 6 FULL_CARD_ POWER_OFF FULL_CA...

Page 19: ...D Ground 12 Key Notch Notch 13 Key Notch Notch 14 Key Notch Notch 15 Key Notch Notch 16 Key Notch Notch 17 Key Notch Notch 18 Key Notch Notch 19 Key Notch Notch 20 GPIO_5 AUDIO_0 PCM_CLK IO PCM data bit clock 1 8 V power domain 21 CONFIG_0 CONFIG_0 DO Not connected internally 22 GPIO_6 AUDIO_1 PCM_DIN DI PCM data input 1 8 V power domain 23 GPIO_11 WOWWAN WAKE_ON_WAN OD Wake up the host Active LOW...

Page 20: ...ower domain 37 PERp1 USB_SS_RX_P AI USB 3 1 receive data 38 NC SDX2AP_STATUS DO Status indication to AP 1 8 V power domain 39 GND GND Ground 40 GPIO_0 SIM_DET2 USIM2_DET DI U SIM2 card insertion detection Internally pulled up to 1 8 V 41 PETn0 PCIE_TX_M AO PCIe transmit data 42 GPIO_1 SIM_DAT2 USIM2_DATA IO U SIM2 card data 1 8 3 0 V power domain 43 PETp0 PCIE_TX_P AO PCIe transmit data 44 GPIO_2 ...

Page 21: ... SDR while transmitting 1 8 V power domain 61 ANTCTL1 O 0 1 8 V RFFE0_DATA DO RFFE0 serial interface data 1 8 V power domain 62 COEX2 COEX_RXD DI LTE WLAN coexistence receive data 1 8 V power domain 63 ANTCTL2 O 0 1 8 V RFFE0_CLK DO RFFE0 serial interface clock 1 8 V power domain 64 COEX1 COEX_TXD DO LTE WLAN coexistence transmit data 1 8 V power domain 65 ANTCTL3 O 0 1 8 V RFFE_VIO_1V8 PO Power s...

Page 22: ...e input voltage will never drop below 3 135 V otherwise the module will be powered off automatically The following figure shows the maximum voltage drop during radio transmission in 3G 4G 5G networks 71 GND GND Ground 72 3 3 V VCC PI Power supply Vmin 3 135 V Vnorm 3 7 V Vmax 4 4 V 73 GND GND Ground 74 3 3 V VCC PI Power supply Vmin 3 135 V Vnorm 3 7 V Vmax 4 4 V 75 CONFIG_2 CONFIG_2 DO Not connec...

Page 23: ...he wider it should be In addition in order to get a stable power source it is recommended to use a zener diode with a reverse zener voltage of 5 1 V and a dissipation power of more than 0 5 W The following figure shows a reference circuit of VCC Module PMU 2 4 70 72 74 C1 100μF D1 5 1V 3 5 11 27 33 39 45 51 57 71 73 VCC VCC GND C5 10pF C4 33pF C3 100nF C3 1μF Figure 4 Reference Circuit of VCC Pins...

Page 24: ...ng It is suggested that the power supply can be cut off after the module is powered off by pulling down the FULL_CARD_POWER_OFF pin for more than 10 s 3 4 Turn on and off Scenarios 3 4 1 Turn on the Module FULL_CARD_POWER_OFF asynchronous signal is an Active Low input that is used to turn off the entire module When the input signal is asserted high 1 19 V the Module will be enabled When the input ...

Page 25: ...l R4 100k Figure 6 Turn on the Module with a Host GPIO 3 4 1 2 Turn on the Module Automatically If FULL_CARD_POWER_OFF is pulled up to VCC with a 5 10 kΩ resistor the module will be powered on automatically when the power supply for VCC is applied A reference circuit is shown in the following figure Host Module FULL_CARD_POWER_OFF PMU GPIO 6 VCC Notes 1 The voltage of pin 6 should be no less than ...

Page 26: ... R1 10k R2 NM_0Ω Figure 8 Turn on the Module with Compatible Design The turn on scenario is illustrated in the following figure VCC RESET_N TBD Module power on or insertion detection USIM1_VDD USIM2_VDD Module Status FULL_CARD_POWER_OFF RFFE_VIO_1V8 33 ms System turn on and booting VIH 1 19 V 1 8 V or 3 0 V System booting Inactive Active tpower on tturn on tbooting 68 ms t0 Figure 9 Turn on Timing...

Page 27: ...odule through FULL_CARD_POWER_OFF In Figure 6 pulling down the FULL_CARD_POWER_OFF pin will turn off the module The turn off scenario is illustrated in the following figure VCC FULL_CARD_POWER_OFF RUNNING OFF Module Status Power off procedure RESET_N H 10 s Figure 10 Turn off Timing through FULL_CARD_POWER_OFF 3 4 2 2 Turn off the Module through AT Command It is a safe way to use AT QPOWD command ...

Page 28: ...of Figure 7 please cut off power supply of VCC after the module USB PCIe is removed as illustrated in Figure 11 Otherwise the module will be powered on again VCC FULL_CARD_POWER_OFF H RUNNING OFF Module Status Turn off procedure RESET_N H USB PCIe AT QPOWD USB PCIe removed Figure 12 Turn off Timing through AT Command and Power Supply Please pull down FULL_CARD_POWER_OFF pin immediately or cut off ...

Page 29: ...l also disconnect the modem from the network Table 7 Definition of RESET_N Pin The module can be reset by pulling down the RESET_N pin for 200 700 ms An open collector drain driver or button can be used to control the RESET_N pin Host Module RESET_N Reset Logic GPIO 67 VDD 1 8V Reset pulse 200 700ms R1 100k R3 100k R2 1k Q1 NPN Figure 13 Reference Circuit of RESET_N with NPN Driving Circuit Pin No...

Page 30: ... Circuit of RESET_N with NMOS Driving Circuit Module RESET_N Reset Logic 67 VDD 1 8V 200 700ms S1 TVS R1 100k 33pF C1 Note The capacitor C1 is recommended to be less than 47pF Figure 15 Reference Circuit of RESET_N with Button The reset scenario is illustrated in the following figure VIL 0 5V VCC 200ms Resetting Module Status Running RESET_N Restart 700ms Figure 16 Resetting Timing of the Module ...

Page 31: ...oved the USIM_DET will change from high to low level This falling edge indicates the absence of the U SIM card The following figure shows a reference design of U SIM interface with a normally closed NC U SIM card connector Pin No Pin Name I O Description Comment 36 USIM1_VDD PO Power supply for U SIM1 card Class B 3 0 V and Class C 1 8 V 34 USIM1_DATA IO U SIM1 card data 1 8 3 0 V power domain 32 ...

Page 32: ...n the U SIM is inserted CD is open from ground and USIM_DET is at high level The following figure shows a reference design of U SIM interface with a normally open NO U SIM card connector Module U SIM Card Connector USIM1_DET USIM1_DATA USIM1_CLK RST CLK CD1 IO USIM1_VDD USIM1_VDD USIM1_RST VCC GND VPP GND TVS Note All these resistors capacitors and TVS should be close to U SIM card connector in PC...

Page 33: ...possible Keep U SIM card signal traces away from RF and VCC traces To avoid cross talk between USIM_DATA and USIM_CLK keep them away from each other and shield them with ground surrounded In order to offer good ESD protection it is recommended to add a TVS diode array with parasitic capacitance not exceeding 10 pF The 22 Ω resistors should be added in series between the module and the U SIM card c...

Page 34: ...dule USB_DM USB_DP USB_SS_RX_P USB_SS_RX_M USB_SS_TX_P USB_SS_TX_M BB USB_DM USB_DP USB_SS_RX_P USB_SS_RX_M USB_SS_TX_P USB_SS_TX_M 9 7 37 35 31 29 ESD Test Points Minimize these stubs in PCB layout C5 220nF C6 220nF C1 220nF C2 220nF R1 0Ω R2 0Ω R3 NM 0Ω R4 NM 0Ω Figure 20 Reference Circuit of USB 3 1 2 0 Interface Pin No Pin Name I O Description Comment 7 USB_DP AI AO USB 2 0 differential data b...

Page 35: ...illators magnetic components RF signal traces or other high noisy signal traces It is important to route USB differential pairs in inner layer of the PCB and surround the traces with ground on that layer and with ground planes above and below The impedance of USB 3 1 2 0 differential trace is 90 Ω For USB 2 0 signal traces the trace length must be less than 120 mm the differential data pair matchi...

Page 36: ...Q GL supports endpoint EP mode In this mode the module is configured as a PCIe EP device The following figure shows a reference circuit of PCIe EP mode Pin No Pin Name I O Description Comment 55 PCIE_REFCLK_P AI AO PCIe reference clock 100 MHz Require differential impedance of 85 Ω 53 PCIE_REFCLK_M AI AO PCIe reference clock 49 PCIE_RX_P AI PCIe receive data Require differential impedance of 85 Ω ...

Page 37: ...2 50 Note The voltage level of VCC_IO_HOST depends on the host side due to the open drain in pins 50 52 and 54 C6 220nF C5 220nF C2 220nF C1 220nF R1 100k R2 100k R3 100k Figure 21 PCIe Interface Reference Circuit EP Mode In order to ensure the signal integrity of PCIe interface AC coupling capacitors C5 and C6 should be placed close to the host on PCB C1 and C2 have been integrated inside the mod...

Page 38: ...round the traces with ground on that layer and with ground planes above and below For PCIe signal traces the recommended maximum length for TX and RX differential data pairs is less than 250 mm and the intra lane length matching of TX and RX differential data pairs is less than 0 7 mm 5 ps 3 8 2 USB Version and PCIe Version Begin with ES2 Engineering Samples 2 RM502Q GL supports USB version and PC...

Page 39: ...PCIe interface by burnt eFuse the module cannot be switched back to USB version Please note that PCIe firmware upgrade may not be supported on non Qualcomm AP chips If the host does not support firmware upgrade at the PCIe only version then RM502Q GL USB 2 0 interface pins 7 and 9 and two test points VREG_L6E_1P8 and FORCE_USB_BOOT reserved on bottom side must be used for firmware upgrade Also the...

Page 40: ...ports 16 bit linear data format The following figures show the primary mode s timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK as well as the auxiliary mode s timing relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK PCM_CLK PCM_SYNC PCM_DOUT MSB LSB MSB 125μ s 1 2 256 255 PCM_DIN MSB LSB MSB Figure 24 Primary Mode Timing PCM_CLK PCM_SYNC PCM_DOUT MSB LSB PCM_DIN 125μ s MSB 1 2 32 31...

Page 41: ... Description Comment 20 PCM_CLK IO PCM data bit clock 1 8 V power domain In master mode it is an output signal In slave mode it is an input signal If unused keep it open 22 PCM_DIN DI PCM data input 1 8 V power domain 24 PCM_DOUT DO PCM data output 1 8 V power domain 28 PCM_SYNC IO PCM data frame sync 1 8 V power domain Pin No Pin Name I O Description Comment 8 W_DISABLE1 DI Airplane mode control ...

Page 42: ...ugh software AT commands The following table shows the RF function status of the module Table 13 RF Function Status 3 10 2 W_DISABLE2 RM502Q GL provides a W_DISABLE2 pin to disable or enable the GNSS function The W_DISABLE2 pin is pulled up by default Driving it low will disable the GNSS function The combination of W_DISABLE2 pin and AT commands can control the GNSS function 68 AP2SDX_STATUS DI St...

Page 43: ... W_DISABLE1 BB GPIO GPIO 26 8 VDD 1 8V Notes The voltage level of VCC_IO_HOST could be 1 8V or 3 3V typically R3 100k R2 100k R5 10k VCC_IO_HOST R6 10k Figure 26 W_DISABLE1 and W_DISABLE2 Reference Circuit 3 10 3 WWAN_LED The WWAN_LED signal is used to indicate RF status of the module and its sink current is up to 10 mA In order to reduce current consumption of the LED a current limited resistor m...

Page 44: ...stor on the host When a URC returns a 1 s low level pulse signal will be outputted to wake up the host The module operation status indicated by WAKE_ON_WAN is shown as below Table 16 State of the WAKE_ON_WAN Signal WWAN_LED Level Description Low Level LED ON RF function is turned on High Level LED OFF RF function is turned off if any of the following occurs The U SIM card is not powered W_DISABLE1...

Page 45: ...em proximity sensor to RM502Q GL module to provide an input trigger which will reduce the output power in radio transmission Table 17 Function of the DPR Signal Please refer to document 2 for more details about AT QCFG sarcfg command 3 10 6 STATUS RM502Q GL provides two status indication pins for communication with IPQ807x device Pin 38 SDX2AP_STATUS outputs the status indication signal to IPQ807x...

Page 46: ...ded in the future version of this document Table 19 Pin Definition of Antenna Tuner Control Interface support based on CS2 and later Pin No Pin Name I O Description Comment 62 COEX_RXD DI LTE WLAN coexistence receive data 1 8 V power domain 64 COEX_TXD DO LTE WLAN coexistence transmit data 1 8 V power domain 59 LAA_TX_EN DO Notification from SDR to WL when LTE transmitting 1 8 V power domain 60 WL...

Page 47: ...10k R2 10k R3 10k R4 10k NM 0Ω NM 0Ω NM 0Ω 0Ω Note The voltage level of VCC_IO_HOST depends on the host side and could be 1 8V or 3 3V Figure 29 Recommended Circuit of Configuration Pins Table 21 Configuration Pins List of M 2 Specification Pin No Pin Name I O Power Domain Description 21 CONFIG_0 DO 0 NC internally 69 CONFIG_1 DO 0 Connected to GND internally 75 CONFIG_2 DO 0 NC internally 1 CONFI...

Page 48: ...lution that supports Gen9 Lite of Qualcomm GPS GLONASS BeiDou Compass and Galileo The module supports standard NMEA 0183 protocol and outputs NMEA sentences at 1 Hz data update rate via USB interface by default By default RM502Q GL GNSS engine is switched off It has to be switched on via AT command For more details about GNSS engine technology and configurations please refer to document 3 ...

Page 49: ...r the module to maintain lock within 3 minutes after the loss of lock 3 Cold start sensitivity the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command Parameter Description Conditions Typ Unit Sensitivity GNSS Cold start Autonomous TBD dBm Reacquisition Autonomous TBD dBm Tracking Autonomous TBD dBm TTFF GNSS Cold start op...

Page 50: ...also supports 5G NR FDD low middle and high bands in SA mode under development Pin Name I O Description Comment ANT0 AI AO Antenna0 interface 5GNR n41 n77 n78 TRx1 LTE LMHB TRx0 B42 B43 B48 MIMO1 50 Ω impedance ANT1 AI AO Antenna1 interface 5GNR n77 n78 DRx n41 TRx0 LTE MHB MIMO1 B42 B43 B48 DRX LAA PRx 50 Ω impedance ANT2_ GNSSL1 AI AO Antenna2 interface 5GNR n77 n78 MIMO2 n41 DRx LTE MHB MIMO2 B...

Page 51: ...0 617 to 960 1452 to 2690 3300 to 4200 LB MHB DRx B42 B43 B48 TRx0 Div1 TRx0 ANT3 617 to 960 1452 to 2690 3300 to 4200 MHB PRx MIMO B42 B43 B48 DRX LAA PRX TRx0 Div0 ANT1 1452 to 2690 3300 to 4200 MHB DRx MIMO B42 B43 B48 MIMO2 LAA DRx Div0 Div1 ANT2_ GNSSL1 1452 to 2690 3300 to 4200 Band Name Transmit MHz Receive MHz LTE FDD LTE TDD UMTS 5G NR IMT 2100 1920 1980 2110 2170 B1 B1 n1 PCS 1900 1850 1...

Page 52: ...19 EU800 832 862 791 821 B20 n20 PCS G 1850 1915 1930 1995 B25 B26 814 849 859 894 B26 700 APAC 703 748 758 803 B28 n28 FLO 717 728 B29 WCS 2305 2315 2350 2360 B30 L band 1452 1496 B32 B34 2010 2025 2010 2025 B34 B38 2570 2620 2570 2620 B38 n38 B39 1880 1920 1880 1920 B39 B40 2300 2400 2300 2400 B40 n40 B41 B41 XGP 2496 2690 2496 2690 B41 n41 B42 3400 3600 3400 3600 B42 B43 3600 3800 3600 3800 B43...

Page 53: ...tic impedance for antenna trace as 50 Ω 2 Place the π type matching components as close to the antenna as possible 3 Digital circuits such as U SIM card USB interface camera module display connector and SD card should be kept away from the antenna traces 4 Keep 75 dB PCB isolation between two antenna traces 5 Keep 15 dB isolation between each antenna to improve the receiving sensitivity 6 It is su...

Page 54: ...ivity 5 3 Reference Design of RF Layout For user s PCB the characteristic impedance of all RF traces should be controlled as 50 Ω The impedance of the RF traces is usually determined by the trace width W the materials dielectric constant the height from the signal layer to reference ground H and the space between RF trace and ground S Microstrip or coplanar waveguide is typically used in RF layout...

Page 55: ... Hardware Design RM502Q GL_Hardware_Design 54 77 Figure 31 Microstrip Design on a 2 layer PCB Figure 32 Coplanar Waveguide Design on a 2 layer PCB Figure 33 Coplanar Waveguide Design on a 4 layer PCB Layer 3 as Reference Ground ...

Page 56: ...istance between the RF pins and the RF connector should be as short as possible All the right angle traces should be changed to curved ones and the recommended angle is 135 There should be clearance area under the signal pin of the antenna connector or solder joint The reference ground of RF traces should be complete Meanwhile adding some ground vias around RF traces and the reference ground impro...

Page 57: ...B48 function Pin Name Description Frequency ANT0 Antenna0 interface 5GNR n41 n77 n78 TRx1 LTE LMHB TRx0 B42 B43 B48 MIMO1 600 5000 MHz ANT1 Antenna1 interface 5GNR n77 n78 DRx N41 TRx0 LTE MHB MIMO1 B42 B43 B48 DRX LAA PRx 1100 6000 MHz ANT2_GNSSL1 Antenna2 interface 5GNR n77 n78 MIMO2 N41 DRx LTE MHB MIMO2 B42 B43 B48 MIMO2 LAA DRx GNSS L1 1400 6000 MHz ANT3 Antenna3 interface 5GNR n77 n78 TRx0 N...

Page 58: ...tenna Installation RM502Q GL is mounted with standard 2 mm 2 mm receptacle RF connectors for convenient antenna connection The connector dimensions are illustrated as below Type Requirements GNSS Frequency range 1559 1606 MHz Polarization RHCP or linear VSWR 2 Typ Passive antenna gain 0 dBi WCDMA LTE 5G NR VSWR 3 Efficiency 30 Input Impedance 50 Ω WCDMA LB LTE LB Cable insertion loss 1 dB WCDMA MB...

Page 59: ...height of 1 45 mm utilizing a Ø1 13 mm coaxial cable The following figure shows the specifications of mating plugs using Ø0 81 mm coaxial cables Figure 37 Specifications of Mating Plugs Using Ø0 81 mm Coaxial Cables The following figure illustrates the connection between the receptacle RF connector on RM502Q GL and the mating plug using a Ø0 81 mm coaxial cable Item Specification Nominal Frequency...

Page 60: ...etween RF Connector and Mating Plug Using Ø0 81 mm Coaxial Cable The following figure illustrates the connection between the receptacle RF connector on RM502Q GL and the mating plug using a Ø1 13 mm coaxial cable Figure 39 Connection between RF Connector and Mating Plug Using Ø1 13 mm Coaxial Cable ...

Page 61: ...ng table Table 30 Absolute Maximum Ratings 6 2 Power Supply Requirements The typical input voltage of RM502Q GL is 3 7 V as specified by PCIe M 2 Electromechanical Specification Rev 1 0 The following table shows the power supply requirements of RM502Q GL Table 31 Power Supply Requirements Parameter Min Max Unit VCC 0 3 4 7 V Voltage at Digital Pins 0 3 2 3 V Parameter Description Min Typ Max Unit ...

Page 62: ...o unrecoverable malfunction There are also no effects on radio spectrum and no harm to radio network Only one or more parameters like Pout might reduce in their values and exceed the specified tolerances When the temperature returns to the normal operating temperature level the module will meet 3GPP specifications again Parameter Description Min Max Unit VIH Input high voltage 0 7 VDD18 1 VDD18 0 ...

Page 63: ...BD mA LTE FDD PF 64 USB disconnected TBD mA LTE FDD PF 128 USB disconnected TBD mA LTE TDD PF 32 USB disconnected TBD mA LTE TDD PF 64 USB disconnected TBD mA LTE TDD PF 128 USB disconnected TBD mA Idle state WCDMA PF 64 USB disconnected TBD mA WCDMA PF 64 USB connected TBD mA LTE FDD PF 64 USB disconnected TBD mA LTE FDD PF 64 USB connected TBD mA LTE TDD PF 64 USB disconnected TBD mA LTE TDD PF ...

Page 64: ... CH3012 23 dBm TBD mA WCDMA B8 HSUPA CH3012 23 dBm TBD mA WCDMA B19 HSDPA CH738 23 dBm TBD mA WCDMA B19 HSUPA CH738 23 dBm TBD mA IVBAT LTE data transfer GNSS OFF LTE FDD B1 CH300 23 dBm TBD mA LTE FDD B2 CH900 23 dBm TBD mA LTE FDD B3 CH1575 23 dBm TBD mA LTE FDD B4 CH2175 23 dBm TBD mA LTE FDD B5 CH2525 23 dBm TBD mA LTE FDD B7 CH3100 23 dBm TBD mA LTE FDD B8 CH3625 23 dBm TBD mA LTE FDD B9 CH39...

Page 65: ...620 23 dBm TBD mA LTE TDD B42 CH42590 23 dBm TBD mA LTE TDD B43 CH44590 23 dBm TBD mA LTE TDD B48 CH55990 23 dBm TBD mA LTE FDD B66 CH66886 23 dBm TBD mA LTE FDD B71 CH68761 23 dBm TBD mA IVBAT 5G NR data transfer GNSS OFF 5G NR TDD n41 CH501204 23 dBm TBD mA 5G NR TDD n41 CH518598 23 dBm TBD mA 5G NR TDD n41 CH535998 23 dBm TBD mA 5G NR TDD n77 CH620668 23 dBm TBD mA 5G NR TDD n77 CH650000 23 dBm...

Page 66: ...TBD mA 5G NR FDD n5 CH177800 23 dBm TBD mA 5G NR FDD n7 CH525000 23 dBm TBD mA 5G NR FDD n7 CH531000 23 dBm TBD mA 5G NR FDD n7 CH537000 23 dBm TBD mA 5G NR FDD n8 CH186000 23 dBm TBD mA 5G NR FDD n8 CH188500 23 dBm TBD mA 5G NR FDD n8 CH191000 23 dBm TBD mA 5G NR FDD n12 CH146800 23 dBm TBD mA 5G NR FDD n12 CH147500 23 dBm TBD mA 5G NR FDD n12 CH148200 23 dBm TBD mA 5G NR FDD n20 CH159200 23 dBm ...

Page 67: ...BD mA 5G NR FDD n66 CH423000 23 dBm TBD mA 5G NR FDD n66 CH429000 23 dBm TBD mA 5G NR FDD n66 CH435000 23 dBm TBD mA 5G NR FDD n71 CH124400 23 dBm TBD mA 5G NR FDD n71 CH126900 23 dBm TBD mA 5G NR FDD n71 CH129400 23 dBm TBD mA IVBAT WCDMA voice call WCDMA B1 CH10700 23 dBm TBD mA WCDMA B2 CH9800 23 dBm TBD mA WCDMA B3 CH1338 23 dBm TBD mA WCDMA B4 CH1638 23 dBm TBD mA WCDMA B5 CH4408 23 dBm TBD m...

Page 68: ...nt is TS 38 101 1 2 clause 6 3 1 6 7 RF Receiving Sensitivity The following tables show conducted RF receiving sensitivity of RM502Q GL module Mode Frequency Max Min WCDMA WCDMA bands 24 dBm 1 3 dB Class 3 50 dBm LTE LTE bands 23 dBm 2 dB Class 3 40 dBm LTE HPUE bands B38 B40 B41 B42 B43 26 dBm 2 dB Class 2 40 dBm 5G NR 5G NR bands 23 dBm 2 dB Class 3 40 dBm BW 5 20 MHz 1 5G NR HUPE bands n41 n77 ...

Page 69: ... 7 dBm LTE LTE FDD B1 10 MHz TBD TBD TBD 96 3 dBm LTE FDD B2 10 MHz TBD TBD TBD 94 3 dBm LTE FDD B3 10 MHz TBD TBD TBD 93 3 dBm LTE FDD B4 10 MHz TBD TBD TBD 96 3 dBm LTE FDD B5 10 MHz TBD TBD TBD 94 3 dBm LTE FDD B7 10 MHz TBD TBD TBD 94 3 dBm LTE FDD B8 10 MHz TBD TBD TBD 93 3 dBm LTE FDD B9 10 MHz TBD TBD TBD 95 3 dBm LTE FDD B12 10 MHz TBD TBD TBD 93 3 dBm LTE FDD B13 10 MHz TBD TBD TBD 93 3 d...

Page 70: ...dBm LTE TDD B43 10 MHz TBD TBD TBD 95 dBm LTE TDD B48 10 MHz TBD TBD TBD 95 dBm 5G NR 5G NR FDD n1 20 MHz SCS 15 kHz TBD TBD TBD 94 0 dBm 5G NR FDD n2 20 MHz SCS 15 kHz TBD TBD TBD 92 0 dBm 5G NR FDD n3 20 MHz SCS 15 kHz TBD TBD TBD 91 0 dBm 5G NR FDD n5 10 MHz SCS 15 kHz TBD TBD TBD 95 0 dBm 5G NR FDD n7 20 MHz SCS 15 kHz TBD TBD TBD 92 0 dBm 5G NR FDD n8 10 MHz SCS 15 kHz TBD TBD TBD 94 0 dBm 5G...

Page 71: ... electrostatic discharge characteristics Table 37 Electrostatic Discharge Characteristics Temperature 25º C Humidity 40 6 9 Thermal Dissipation RM502Q GL is designed to work over an extended temperature range In order to achieve a maximum performance while working under extended temperatures or extreme conditions such as with maximum power or data rate for a long time it is strongly recommended to...

Page 72: ...rom other heating sources Module mounting holes must be used to attach ground the device to the main PCB ground It is NOT recommended to apply solder mask on the main PCB where the module s thermal dissipation area is located Select an appropriate material thickness and surface for the outer housing i e the mechanical enclosure of the application device that integrates the module so that it provid...

Page 73: ...5G Module Series RM502Q GL Hardware Design RM502Q GL_Hardware_Design 72 77 For more detailed guidelines on thermal design please refer to document 5 NOTE ...

Page 74: ... and Packaging This chapter mainly describes mechanical dimensions and packaging specifications of RM502Q GL module All dimensions are measured in mm and the tolerances are 0 05 mm unless otherwise specified 7 1 Mechanical Dimensions of the Module Figure 41 Mechanical Dimensions of RM502Q GL Unit mm ...

Page 75: ...om View Figure 42 Top and Bottom Views of the Module These are rendering images of RM502Q GL module For authentic appearance please refer to the module that you receive from Quectel 7 3 M 2 Connector RM502Q GL adopts a standard PCI Express M 2 connector which compiles with the directives and standards listed in document 4 NOTE ...

Page 76: ...procedures are as below 1 Use 10 trays to package 100 modules at a time tray size 247 mm 172 mm 2 Place an empty tray on the top of the 10 tray stack 3 Fix the stack with masking tape in shape as shown in the following figure 4 Pack the stack with conductive bag and then fix the bag with masking tape 5 Place the list of IMEI No into a small carton 6 Seal the carton and then label the seal with sea...

Page 77: ...on_Note RM502Q GNSS application note 4 Quectel_RF_Layout_Application_Note RF layout application note 5 Quectel_RM502Q_Module_Thermal_Simulation RM502Q module thermal simulation 6 PCI Express M 2 Specification Rev3 0 PCI express M 2 specification Abbreviation Description bps Bit Per Second CHAP Challenge Handshake Authentication Protocol DC HSPA Dual carrier High Speed Packet Access DFOTA Delta Fir...

Page 78: ...ess kbps Kilo Bits Per Second LAA License Assisted Access LED Light Emitting Diode LTE Long Term Evolution Mbps Mega Bits Per Second ME Mobile Equipment MIMO Multiple Input Multiple Output MLCC Multiplayer Ceramic Chip Capacitor MMS Multimedia Messaging Service MO Mobile Originated MT Mobile Terminated PAP Password Authentication Protocol PCB Printed Circuit Board PCIe Peripheral Component Interco...

Page 79: ...UT and the user s body and must not transmit simultaneously with any other antenna or transmitter RF Radio Frequency Rx Receive SAR Specific Absorption Rate SMS Short Message Service Tx Transmit UART Universal Asynchronous Receiver Transmitter UL Uplink URC Unsolicited Result Code USB Universal Serial Bus U SIM Universal Subscriber Identity Module VIH Input High Voltage Level VIL Input Low Voltage...

Page 80: ...nal emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter s rule s The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed Important Note notice that any deviation s from the defined parameters of the antenna trace as described by the instructions require that the host product manufacturer must notify to ...

Page 81: ...ting both maximum RF output power and human exposure to RF radiation maximum antenna gain including cable loss must not exceed Test Mode Antenna Gain dBi Test Mode Antenna Gain dBi WCDMA B2 8 00 LTE B38 2 00 WCDMA B4 5 00 LTE B41 2 00 WCDMA B5 5 00 LTE B48 2 00 LTE B2 8 00 LTE B66 5 00 LTE B4 5 00 LTE B71 5 00 LTE B5 5 00 n2 8 00 LTE B7 8 00 n5 5 00 LTE B12 5 00 n7 8 00 LTE B13 5 00 n12 5 00 LTE B...

Page 82: ...es Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Any changes or modifications not expressly approved by the party responsible for compliance could void the user s authority ...

Page 83: ...nna As long as 2 conditions above are met further transmitter test will not be required However the OEM integrator is still responsible for testing their end product for any additional compliance requirements required with this module installed Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment This equipment should be ...

Page 84: ...its set forth for an uncontrolled environment This equipment should be installed and operated with minimum distance 20 cm between the radiator your body Déclaration d exposition aux radiations Cet équipement est conforme aux limites d exposition aux rayonnements ISED établies pour un environnement non contrôlé Cet équipement doit être installé et utilisé avec un minimum de 20 cm de distance entre ...

Page 85: ... the transmitter and obtaining a separate Canada authorization NOTE IMPORTANTE Dans le cas où ces conditions ne peuvent être satisfaites par exemple pour certaines configurations d ordinateur portable ou de certaines co localisation avec un autre émetteur l autorisation du Canada n est plus considéré comme valide et l ID IC ne peut pas être utilisé sur le produit final Dans ces circonstances l int...

Page 86: ... required regulatory information warning as show in this manual Manuel d information à l utilisateur final L intégrateur OEM doit être conscient de ne pas fournir des informations à l utilisateur final quant à la façon d installer ou de supprimer ce module RF dans le manuel de l utilisateur du produit final qui intègre ce module Le manuel de l utilisateur final doit inclure toutes les informations...

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