Quectel BG77, Hardware Design

Page: 26 / 80

LPWA Module Series
BG77 Hardware Design
BG77_Hardware_Design 22 / 76
SPI_MOSI 40 DO
SPI master-out
slave-in
V
OL
max=0.45V
V
OH
min=1.35V
BOOT_CONFIG.
Do not pull it up
before startup .
1.8V power domain.
If unused, keep this
pin open.
SPI_MISO 8 DI
SPI master-in
slave-out
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
SPI_CS_N 63 DO SPI chip select
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep this
pin open.
SPI_CLK 9 DO SPI clock
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep this
pin open.
GPIO Interfaces*
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
GPIO1 1 IO
General-
purpose input/
output interface
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
GPIO2 33 IO
General-
purpose input/
output interface
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
GPIO3 57 IO
General-
purpose input/
output interface
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
ADC Interfaces
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
ADC0 17 AI
General
purpose analog Voltage range:
0.1V to 1.8V If unused, keep this
pin open.