LPWA Module Series
BG77 Hardware Design
BG77_Hardware_Design 16 / 76
3.1. Pin Assignment
The following figure shows the pin assignment of BG77.
38
38 RTS
77 AP_READY
32
31
30
29
28
27
26
53
54
55
56
1
2
3
4
5
6
7
8
9
40
39
37
36
35
34
33
57
58
59
60
61
62
63
73
74
75
76
77
78
89
88
87
86
85
94
93
92
91
90
79
80
81
82
83
84
71
70
69
68
67
66
65
45
46
47
48
49
50
51
52
25
24
23
22
21
20
19
18
17
72
41
42
64
43
44
10
11
12
13
14
15
16
60 DBG_TXD
1 GPIO1
5 I2C_SDA
UART
33 GPIO2
34 PCM_DOUT
35 PCM_SYNC
36 GNSS_TXD
37 I2C_SCL
39 CTS
40 SPI_MOSI
ANT
GND
26
ANT_MAIN
32
ANT_GNSS
57 GPIO3
61 DBG_RXD
62 DTR
63 SPI_CS
78 STATUS
76 RI
87 USB_BOOT
I2C
SPI
DCD 90
NETLIGHT 79
ADC1
18
10
USB_DM
11
USB_DP
12
USB_VBUS
4)
13
USIM_CLK
14
USIM_DATA
15
USIM_RST
16
USIM_VDD
44
USIM_DET
42
USB_VDDA_3P3
64
EXT_PWR_EN
ADC0 17
VBAT 19
VBAT 20
VDD_EXT 21
USB
USIM
POWER
2 PCM_DIN
3 PCM_CLK
4 GNSS_RXD
6 RXD
7 TXD
8 SPI_MISO
9 SPI_CLK
USB
PCM
RESERVED
OTHERS
41
W_DISABLE#
RESET_N
45
PWRKEY
46
USIM_GND 65
72
PON_TRIG
GRFC2 94
GRFC1 83
Figure 2: Pin Assignment (Top View)
1. PWRKEY output voltage is 1.5V because of the voltage drop inside the Qualcomm chipset. Due to
platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY
should never be pulled down to GND permanently.
2. RESET_N is multiplexed from PWRKEY
.
NOTES