Quectel AF50T, Hardware Design, Page: 18 / 55

Wi-Fi&BT Module Series
AF50T Hardware Design
AF50T_Hardware_Design 17 / 52
PCM_CLK* 37 DI PCM clock
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
PCM_DOUT* 36 DO PCM data output
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
BT_RTS 77 DO
BT UART request to
send
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
BT_CTS 38 DI
BT UART clear to
send
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
BT_TXD 39 DO BT UART transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
BT_RXD 78 DI BT UART receive
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
Control Signal Pins*
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
SW_CTRL 57 DO
Control PMIC
outputs
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
HOST_
WAKEUP_
23 DI Host wakes up BT
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
If unused, keep this
pin open.
BT_WAKEUP_
HOST
22 DO
BT wakes up the
host
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
If unused, keep this
pin open.
Coexistence Interfaces
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
COEX_TXD 59 DO
LTE/WLAN & BT
coexistence
transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
If unused, keep this
pin open.
COEX_RXD 16 DI
LTE/WLAN & BT
coexistence
receive
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
If unused, keep this
pin open.
LAA_AS_EN* 82 DI Allow LAA to control V
IL
min = -0.3 V 1.8 V power domain.