Power Application Controller
®
-90-
Copyright 2020 © Qorvo, Inc.
Rev 1.2
– Jan 17, 2019
9.20.12 SOC.HPDACH
Register 9-12 SOC.HPDACH (HPDAC High Setting, 11h)
9.20.13 SOC.HPDACL
Register 9-13 SOC.HPDACL (HPDAC Low Setting, 12h)
9.20.14 SOC.LPDACH
Register 9-14 SOC.LPDACH (LPDAC High Setting, 13h)
9.20.15 SOC.LPDACL
Register 9-15 SOC.LPDAC1 (LPDAC Low Setting, 14h)
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:0
HPDAC[9:2]
R/W
0
HPDAC MSB setting bits 9:2
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:2
RFU
R
0
Reserved, write to 0
1:0
HPDAC[1:0]
R/W
0
HPDAC MSB setting bits 1:0
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:0
LPDAC[9:2]
R/W
0
LPDAC MSB setting bits 9:2
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:2
Reserved
R
0b
Reserved, write to 0.
1:0
LPDAC[1:0]
R/W
0b
LPDAC Setting bits 1:0
