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Serial Interface Subsystem

67

Payload Communication Timeout

Some of the SIPL commands are subject to payload communication timeouts. If the payload
does not respond with a correct reply within a definite period of time, the MMC assumes that a
payload communication timeout occurred and acts accordingly. The SIPL timeout value also
limits the period of time given to the payload to prepare for a payload reset.

“Get Payload Communication Timeout Command,” on page 67

“Set Payload Communication Timeout Command,” on page 67

Get Payload Communication Timeout Command

The MMC supports reading of the payload communication timeout using the

Get Payload

Communication Timeout

command. This command has the following synopsis:

[B8 xx 09 0A 40 00]

The MMC responds to the

Get Payload Communication Timeout

command with the

following reply:

[BC xx 09 00 0A 40 00

<payload timeout>

]

The

<payload timeout>

parameter is the payload communication timeout measured in

hundreds of milliseconds. Thus, the payload communication timeout may vary from 0.1 to 25.5
seconds. The default value of the payload communication timeout is specified by the
CFG_APP_SIPL_PAYLOAD_TIMEOUT Configuration Parameter.

Set Payload Communication Timeout Command

To change the payload communication timeout, the

Set Payload Communication Timeout

command is used:

[B8 xx 0A 0A 40 00

<payload timeout>

]

Graceful Payload Reset

The MMC supports the Graceful Reboot option of the

FRU Control

command. On receiving

such a command, the MMC sets the Graceful Reboot Request bit of the MMC status, sends a
status update notification to the payload, and waits for the

Graceful Reset

command from the

payload. If the MMC receives such a command before the payload communication timeout
time, it sends the 0x00 completion code (Success) to the carrier controller. Otherwise, the 0xC3
completion code (Timeout) is sent.

The

Graceful Reset

command has the following synopsis:

[B8 xx 11 0A 40 00]

Note that the MMC does not reset the payload on receiving the

Graceful Reset

command or

timeout. If the MMC participation is necessary, the payload must request the MMC to perform a
payload reset.

The

Graceful Reset

command is also used to notify the MMC about the completion of the

payload shutdown sequence (refer to

“Payload Shutdown Timeout,” on

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Summary of Contents for AMC131

Page 1: ...AMC131 MPC8641D Processor AdvancedMC Module Hardware Manual www pt com 205 Indigo Creek Drive Rochester NY 14626 Phone 1 585 256 0200 support pt com TM ...

Page 2: ...mber 16 2008 Expanded SW2 now SW1 description 126p0609 14 March 18 2009 Added warning and caution about product handling in Chapter 9 Agency Approvals on page 103 126p0609 15 June 10 2009 Standardized Module Management Controller MMC on page 28 and Chapter 5 System Monitoring and Alarms on page 53 Updated SDRAM on page 25 Memory Configuration on page 35 200 pin SDRAM Sockets P6 P7 on page 48 Batte...

Page 3: ...tronic components on printed circuit boards are extremely sensitive to static electricity Ordinary amounts of static electricity generated by your clothing or work environment can damage the electronic equipment It is recommended that anti static ground straps and anti static mats are used when installing the board in a system to help prevent damage due to electrostatic discharge Additional safety...

Page 4: ...4 ...

Page 5: ... 21 Product Definition 21 AMC131 Features 22 I O Configurations 22 AMC131 Front Panel 23 Functional Blocks 24 MPC8641D Dual Core PowerPC Processor 24 Memory 25 AMC Interface 26 Quad Ethernet Port Architecture 26 PCI Express 27 Serial Rapid IO 27 Module Management Controller MMC 28 Sensors 28 Universal Serial Bus 28 Console Port 28 Push Button Reset 29 Real time Clock with Battery Backup 29 Watchdo...

Page 6: ...ions and Locations 37 Switch Descriptions 38 Physical Installation 41 Installing the AMC131 41 Removing the AMC131 41 Chapter 4 Connectors 43 Front Panel Connectors 44 USB Connector J1 45 Console Port Connector J2 45 10 100 1000 Base T Ethernet Port Connectors J3 J4 46 Internal Connectors 47 200 pin SDRAM Sockets P6 P7 48 Battery Socket BT1 48 MiniSD Card Connector P1 48 Payload Processor IMC Conn...

Page 7: ...Mode Line Editing 63 Supported PPS Extension Commands 63 Firmware Upgrade Process 70 HPM 1 Boot Loader 70 HPM 1 Firmware Upgrade 70 Upgrade Utilities 71 Detailed HPM 1 Upgrade Procedure 71 IPMI Communication Utility ipmitool 72 Chapter 6 Reset Configuration 79 Reset Types and Sources 79 Power Reset 79 Hard Reset 80 Soft Reset 80 Limited Resets 80 Chapter 7 Programmable Registers 83 Register Defini...

Page 8: ... Chapter 8 Specifications 99 Electrical and Environmental Specifications 99 AMC131 Absolute Maximum Ratings 100 DC Operating Characteristics 100 Battery Backup Characteristics 101 AMC131 Reliability 101 Mechanical Specifications 102 Chapter 9 Agency Approvals 103 Network Equipment Building System NEBS and European Telecommunications Standards Institute ETSI 103 CE Certification 103 EN55022 Radiate...

Page 9: ...USA Class A Notice 104 Industry Canada Class A Notice 105 Product Safety Information 105 Safety Precautions 105 Compliance with RoHS and WEEE Directives 106 Chapter 10 Data Sheet Reference 107 Module Management Controller 107 User Documentation 108 ...

Page 10: ...Contents 10 ...

Page 11: ...d Spectrum 40 Table 4 1 Connector Assignments 43 Table 4 2 USB Connector Pinout 45 Table 4 3 Console Port Connector Pinout RJ 11 45 Table 4 4 DB 9 Console Cable Pinout 46 Table 4 5 10 100 1000 Base T Ethernet Port Connector Pinout RJ 45 46 Table 4 6 Payload Processor ICE and JTAG PCB Connector Pinout 48 Table 4 7 Payload Processor ICE Cable Connector Pinout 49 Table 4 8 AMC131 Connector Pinout 50 ...

Page 12: ...stom Address Offset 2d 2h Bits 86 Table 7 7 Custom Address Offset 2d 2h Description 86 Table 7 8 Custom Address Offset 3d 3h Bits 86 Table 7 9 Custom Address Offset 3d 3h Description 86 Table 7 10 Custom Address Offset 4d 4h Bits 87 Table 7 11 Custom Address Offset 4d 4h Description 87 Table 7 12 Custom Address Offset 5d 5h Bits 87 Table 7 13 Custom Address Offset 5d 5h Description 87 Table 7 14 C...

Page 13: ... Table 7 30 Custom Address Offset 14d Eh Description 94 Table 7 31 Custom Address Offset 15d Fh Bits 94 Table 7 32 Custom Address Offset 13d Fh Description 94 Table 7 33 Custom Address Offset 16d 10h Bits 95 Table 7 34 Custom Address Offset 16d 10h Description 95 Table 7 35 Custom Address Offset 17 11h Bits 95 Table 7 36 Custom Address Offset 17 11h Description 95 Table 7 37 Custom Address Offset ...

Page 14: ...Tables 14 ...

Page 15: ...ap 35 Figure 3 2 Installing a MiniSD Card 36 Figure 3 3 AMC131 Switch Locations 37 Figure 4 1 AMC131 Front Panel Connectors 44 Figure 4 2 AMC131 Connector Locations 47 Figure 5 1 PPS Extension Command Request 62 Figure 5 2 PPS Extension Command Response 62 Figure 8 1 AMC131 Board Dimensions 102 Figures ...

Page 16: ...Figures 16 ...

Page 17: ...apter 6 Reset Configuration on page 79 describes the AMC131 reset types with their respective sources Chapter 7 Programmable Registers on page 83 describes the programmable registers used to configure and monitor AMC131 functionality Chapter 8 Specifications on page 99 contains mechanical electrical and environmental specifications Chapter 9 Agency Approvals on page 103 presents agency approvals a...

Page 18: ...er 2 TELEPHONE Contact us via telephone at the number listed below and request Technical Support Our offices are open Monday to Friday 8 00 a m to 8 00 p m Eastern Time If you are located outside North America we encourage you to contact the local PT distributor or agent for support Many of our distributors or agents maintain technical support staffs Conventions in This Guide Convention Used For M...

Page 19: ...e repair or replace the product provided proof of purchase and written notice of nonconformance are received by Performance Technologies within 12 months of shipment or in the case of software and integrated circuits within ninety 90 days of shipment and provided said nonconforming products are returned F O B to Performance Technologies s facility no later than thirty days after the warranty perio...

Page 20: ...S WHETHER EXPRESS IMPLIED OR STATUTORY INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS IN NO EVENT SHALL PERFORMANCE TECHNOLOGIES BE LIABLE FOR ANY INCIDENTAL OR CONSEQUENTIAL DAMAGES DUE TO BREACH OF THIS WARRANTY OR ANY OTHER OBLIGATION UNDER THIS ORDER OR CONTRACT ...

Page 21: ... PT AMP5071 and mounted on a carrier board for use in an ATCA system allowing system designers to build NEBS compliant highly reliable solutions that combine state of the art management the highest performance power and cooling and integrated switching Ethernet connectivity is available through dual front panel RJ 45 10 100 1000Base T Ethernet ports The AMC131 supports the PICMG sub specifications...

Page 22: ... AMC 1 one port of type 1 2 or 4 lanes at 2 5 Gb per lane only and Serial Rapid IO AMC 4 one port of 4 lanes at 3 125 Gbaud 2 5 Gb s per lane only Serial Rapid IO AMC 4 one port of 4 lanes with each lane at 3 125 Gbaud 2 5 Gb s only Ethernet AMC transport build option AMC 2 Type E2 Single width PICMG AMC 0 module Standard height is mid size Full size height option is available NexusWare operating ...

Page 23: ...see the appropriate sections in this guide Figure 2 1 AMC131 Front Panel 10 100 1000 Ethernet 1 Reset Switch SW3 10 100 1000 Ethernet 2 CPU2 Status LED Hot Swap LED Ethernet 2 Link Activity LED COM Port USB Port In Service LED CPU1 Status LED Ethernet 1 Link Activity LED USB Activity LED Out Of Service LED Hot Swap Handle CPU1 CPU2 OOS LED IS LED ...

Page 24: ...ore information about these options The AMC131 design ensures that each PowerPC e600 processor has access to every resource on the module Allocating management of multiple resources to the two processors requires several components These components include The IIC1 controller A common negotiating process The IIC1 controller provides a communication mechanism that does not rely on any software mana...

Page 25: ...35 For additional SDRAM density options please contact your PT sales representative Memory is not a field serviceable item Return the module to PT for memory replacement See Return Merchandise Authorization RMA on page 19 for more information about returning merchandise Flash Memory Onboard non volatile programmable Flash memory 128 Mb x 8 is provided for startup code and application storage This ...

Page 26: ...MC131 Connector Locations on page 47 Two 1000 BASE BX Ethernet connections are used on ports 0 and 1 Table 2 3 provides the Ethernet port mapping For 10 100 1000 BASE T RJ 45 and AMC131 connector pinout see Chapter 4 Connectors on page 43 Table 2 2 AC131 Supported PICMG Subsidiary Specifications Types Supported AMC 1 PCIe AMC 2 1GbE AMC 4 SRIO Build Option 1 Type 1 1x on Port 4 Type 2 2x on Port 4...

Page 27: ...d IO The Serial Rapid IO SRIO port is compatible with the Serial Rapid IO Specification Revision 1 0 It supports x1 or x4 lane widths with each lane at 3 125 Gbaud 2 5 Gb s only The SRIO interface can be configured by the user as an SRIO Agent or as a Host SRIO is configured as an Agent by default It can also be configured with either small system 8 bit source and destination IDs for up to 256 dev...

Page 28: ... Monitoring and Alarms on page 53 Universal Serial Bus The AMC131 has one Universal Serial Bus USB port on the front panel see Figure 2 1 AMC131 Front Panel on page 23 This USB 2 0 port is supported by the Philips ISP1160 dual port host controller For USB pinout information see Console Port Connector J2 on page 45 Console Port The front panel console port see Figure 2 1 AMC131 Front Panel on page ...

Page 29: ... and 31 day months including leap year An alarm clock function is provided on the real time clock with one second minimum resolution that can be enabled to generate payload processor interrupts The AMC131 supports an external industry standard 2016 size coin cell battery to ensure that the clock remains current when the computer is turned off The battery life is five years Watchdog Timer The watch...

Page 30: ...olor The IS LED is activated when the OOS LED is turned off It is never turned on when the OOS LED is on The IS LED is green when all sensors are within the critical thresholds or amber when one or more sensors have exceeded a critical threshold Table 2 5 AMC131 LED Architecture LED Name Color Description AMC LED 1 OOS Red Out Of Service geographic Option 1 Amber Out Of Service geographic Option 2...

Page 31: ...display PLD registers and networking related registers on the processor Miscellaneous commands that allow running a function when its memory address is known flushing either the data or instruction caches and erasing and programming the application flash among other functions For more information about PTBMON see the PTBMON Boot Monitor User Guide As an alternative to PTBMON the AMC131 may be prov...

Page 32: ...Chapter 2 Introduction 32 ...

Page 33: ...nsible for the shipping and report the damage before opening and unpacking the container It is recommended that you also notify PT see Customer Support and Services on page 18 Caution To reduce the risk of damage to the AMC131 this equipment must be protected from electrostatic discharge EMC and physical shock Never remove any of the socketed parts except in a static free environment Use the anti ...

Page 34: ... Environmental Requirements Electrical specifications are presented in detail in Electrical and Environmental Specifications on page 99 The AMC131 operates between 0 C 32 F and 55 C 132 F ambient with a minimum of 250 LFM 1 27 meters per second of external airflow It is the user s responsibility to ensure that the AMC131 is installed in a chassis capable of supplying adequate airflow The maximum p...

Page 35: ...alling a MiniSD Card on page 36 for the socket location Removing a MiniSD Card To remove the miniSD card from the socket 1 Push in on the miniSD card to unlatch it The miniSD card springs out about 1 4 from the socket when it is properly unlatched 2 Gently remove the miniSD card from the socket Installing a MiniSD Card To install a miniSD card in the socket 1 Orient the AMC131 and miniSD card as s...

Page 36: ... Switch Configuration The AMC131 includes several options that tailor the operation of the module Most of the options are selected through software however some options cannot be software controlled and are configured with switches Closing or opening the desired switch selects each switch s options Key topics in this section Switch Options and Locations on page 37 AMC131 Switch Locations on page 3...

Page 37: ...ings documented as SW2 in this document must be applied to the switch marked SW1 on those boards Push button switch SW3 Hot swap handle switch SW4 Figure 3 3 AMC131 Switch Locations shows the AMC131 switch locations on the top and bottom sides of the module Figure 3 3 AMC131 Switch Locations SW2 PCI Express Configuration User Defined SW4 Hot Swap Handle Switch SW3 Push Button Reset SW1 Serial Rapi...

Page 38: ...nd destination IDs supporting 256 devices SW1 1 sets the SRIO controller system size as shown in Table 3 1 SW1 2 SW1 4 SRIO Device IDs small system only If large size is selected with SW1 1 SW1 2 SW1 4 settings are ignored If small size is selected SW1 2 SW1 4 are used to set configuration device ID bits 5 7 as shown in Table 3 2 If configured as a SRIO Host see SW2 1 PCIe Root Complex Endpoint SR...

Page 39: ... is normally made by the MMC through e keying with the AMC ATCA shelf controller The e keying process can set up the AMC131 to source the FCLKA receive the FCLKA or be isolated from the FCLKA The AMC131 can also be forced to receive the FCLKA from the system SW2 2 tells the MMC what action is desired for FCLKA selection The settings for SW2 2 are shown in Table 3 4 If the AMC131 does not boot up w...

Page 40: ...tch is accessible from the AMC131 front panel see Figure 2 1 AMC131 Front Panel on page 23 Pressing SW3 causes the MPC8641D processor to reset SW4 Hot Swap Handle Switch The AMC131 provides a hot swap handle on its front panel see Figure 2 1 AMC131 Front Panel on page 23 This handle is attached to a mechanical latching mechanism and to the hot swap switch When this switch opens or closes it sends ...

Page 41: ...assis When the module card edge connector makes proper contact with the backplane connector the blue hot swap LED turns ON and the hardware connection process begins When the module is operational the blue hot swap LED turns OFF 4 Connect any cables from peripheral devices Removing the AMC131 To remove the module 1 Unlock the module by pulling the handle away from the front panel The blue hot swap...

Page 42: ...Chapter 3 Getting Started 42 ...

Page 43: ...f description of each connector is given in Table 4 1 Connector Assignments A detailed description and pinout for each connector is given in the following topics Table 4 1 Connector Assignments Function Location USB Connector J1 Front Panel Console Port Connector J2 Front Panel 10 100 1000 Base T Ethernet Port Connectors J3 J4 Front Panel 200 pin SDRAM Sockets P6 P7 Internal Battery Socket BT1 Int...

Page 44: ...nectors are as follows USB port optional connector Console port connector 10 100 1000 Base T Ethernet port FP1 and FP2 connectors Figure 4 1 AMC131 Front Panel Connectors 10 100 1000 Ethernet 1 J3 10 100 1000 Ethernet 2 J2 Console Port J2 USB Port J1 CPU1 CPU2 OOS LED IS LED ...

Page 45: ...t support Request to Send RTS Clear to Send CTS and modem control signals The RJ 11 console port is multiplexed to support both the MPC8641D processor and the Module Management Controller MMC For more information about the console port functionality see Console Port on page 28 Table 4 3 shows the console port pinout Table 4 2 USB Connector Pinout Type A Pin Name 1 VBUS 2 D 3 D 4 GND Table 4 3 Cons...

Page 46: ...FP2 in order to support CAT5 cabling These connectors are pinned for medium dependent interface MDI operation on DTE equipment according to IEEE 802 3 2000 Table 23 6 Both front panel Ethernet ports can be utilized as management ports to the MPC8641D processor During the boot process you are provided with a time period to choose to abort the normal process and proceed with a boot loading process u...

Page 47: ...agement controller MMC and in circuit emulator IMC connector See Figure 4 2 AMC131 Connector Locations on page 47 for connector identification Figure 4 2 AMC131 Connector Locations MiniSD Card Connector P1 Reserved Connector P4 Memory Sockets P6 P7 Battery Socket BT1 Payload Processor IMC Connectors P2 P3 AdvancedMC Card Edge Connector P5 USB Port J1 Console Port J2 10 100 1000 Ethernet 1 J3 10 10...

Page 48: ...information See Working with the MiniSD Card on page 35 for information about miniSD card installation and removal Payload Processor IMC Connector P2 P3 The payload processor in circuit emulator is accesses through connectors P2 and P3 Table 4 6 provides the pinout Table 4 6 Payload Processor ICE and JTAG PCB Connector Pinout P3 PIN NET Pin Function on the Module 1 CPU1_TDO CPU1 Test Data Out 2 CP...

Page 49: ...COP Test Data In 4 COP_TRST_N COP Test Reset 5 COP_RUN_START_N COP Run Start 6 VDD_SENSE Ensures that the COP is aware whether 3 3V power is applied to the module 7 COP_TCK COP Test Clock 8 COP_CKSTP_IN_N COP Checkstop In 9 COP_TMS COP Test Mode Select 10 11 COP_SRST_N COP Software Reset 12 GND Logical Ground 13 COP_HRST_N COP Hardware Reset 14 KEY A key is a non populated pin in the connector pla...

Page 50: ...ement Power 167 TRST Carrier Second JTAG Test Reset Input 5 GA0 Carrier Second Geographic Addr 0 166 TMS Carrier Second JTAG Test Mode Select In 6 RSRV D6 Second Reserved n a 165 TCK Carrier Second JTAG Test Clock Input 7 GND First Logic Ground 164 GND First Logic Ground 8 RSRV D8 Second Reserved n a 163 Tx20 Third Port 20 Tx 9 PWR Carrier First Payload Power 162 Tx20 Third Port 20 Tx 10 GND First...

Page 51: ...Tx 126 Tx14 Third Port 14 Tx 46 GND First Logic Ground 125 GND First Logic Ground 47 Rx4 Third Port 4 Rx 124 Rx14 Third Port 14 Rx 48 Rx4 Third Port 4 Rx 123 Rx14 Third Port 14 Rx 49 GND First Logic Ground 122 GND First Logic Ground 50 Tx5 Third Port 5 Tx 121 Tx13 Third Port 13 Tx 51 Tx5 Third Port 5 Tx 120 Tx13 Third Port 13 Tx 52 GND First Logic Ground 119 GND First Logic Ground 53 Rx5 Third Por...

Page 52: ...rst Logic Ground 95 GND First Logic Ground 77 CLK2 Third Sync Clock 2 94 Rx9 Third Rx 78 CLK2 Third Sync Clock 2 93 Rx9 Third Port 9 Rx 79 GND First Logic Ground 92 GND First Logic Ground 80 CLK3 Third Sync Clock 3 91 Tx8 Third Port 8 Tx 81 CLK3 Third Sync Clock 3 90 Tx8 Third Port 8 Tx 82 GND First Logic Ground 89 GND First Logic Ground 83 PS0 Carrier Last Presence 0 88 Rx8 Third Port 8 Rx 84 PWR...

Page 53: ...al and non critical alerting Monitoring of the voltage rails with critical and non critical alerting Remote reset and shutdown of the board Monitoring of ejector switches for hot swap functionality PT NexusWare IPMI driver and firmware provide features for hot swap Monitoring and event reporting of critical errors Interface to IPMB line IPMB L In order to take advantage of the features provided by...

Page 54: ...d by the firmware IPMI aware applications must be developed Information on IPMI v1 5 is provided at http www intel com design servers ipmi spec htm Summary of Supported Commands Table 5 1 IPMI PICMG Command Subset Supported by the MMC Firmware lists all the commands supported by the MMC The Spec Ref column indicates where in the relevant specification a command is defined IPMI references are to v1...

Page 55: ...11 S E 29h Optional Get Sensor Event Status 29 13 S E 2Bh Optional Get Sensor Reading 29 14 S E 2Dh Mandatory FRU Device Commands Get FRU Inventory Area Info 28 1 Storage 10h Mandatory Read FRU Data 28 2 Storage 11h Mandatory Write FRU Data 28 3 Storage 12h Mandatory AdvancedTCA Commands Get PICMG Properties 3 10 PICMG 00h Mandatory FRU Control 3 25 PICMG 04h Mandatory FRU Control Capabilities 3 2...

Page 56: ...rd retrieved in response to a Get Device Locator Record ID command for this module c The HPM 1 Initiate Upgrade Action command is mandatory for an IPM Controller indicating that any of its implemented components supports preparation for Firmware Upgrade or comparison of the current firmware d The HPM 1 Query Self test Results command is mandatory for IPM Controllers indicating self test is support...

Page 57: ...ocator Record Parameter Value Power State Notification ACPI System Power State notification required NO ACPI Device Power State notification required NO Global Initialization Controller logs Initialization Agent errors NO Log Initialization Agent errors accessing this controller NO Event Generation Enable event message generation from controller Device Capabilities Chassis Device NO Bridge NO IPMB...

Page 58: ... Provides Device SDRs YES Device Revision Number 0x00 Device Available YES Firmware Revision Changes with each release IPMI Version 1 5 Additional Device Support Chassis Device NO Bridge NO IPMB Event Generator YES IPMB Event Receiver NO FRU Inventory Device YES SEL Device NO SDR Repository Device NO Sensor Device YES Manufacturer ID 0x000614 Product ID 0x0007 Auxiliary Firmware Revision Informati...

Page 59: ...1 14V 1 15V 1 3V 1 31V 1 32V 3 1 05V 1 1V SVDD1 0 988V 1 05 1 0V 1 06 1 01V 1 07 1 09V 1 13 1 1V 1 14 1 112V 1 15 4 5 1V USB N A N A 4 375V 5 525V N A N A 5 2 5V PHY1 2 365V 2 38V 2 39V 2 61V 2 62V 2 635V 6 0 9V DDR2 VTT 0 791V 0 8V 0 81V 0 99V 1 0V 1 009V 7 12V 10 0V 10 4V 10 8V 13 2V 13 6V 14 0V 8 3 3V 2 96V 2 97V 2 98V 3 62V 3 63V 3 64V 9 1 8V DDR2 VDDQ 1 7V 1 71V 1 72V 1 88V 1 89V 1 9V 10 1 05...

Page 60: ... general no action is required However in certain contexts system or shelf management software may decide that preventive action should be taken For example if several modules in a shelf report upper non critical temperature events the shelf manager might decide to increase fan speed Critical Events Critical events indicate that the module is still within its operating limits but it is close to ex...

Page 61: ...cket plus newline characters serve as START and STOP delimiters for a message The MMC does not support multi line IPMI messages Raw IPMI Messages The SIPL supports raw IPMI messages that are entered as sequences of case insensitive hex ASCII pairs each pair optionally separated from the previous one with a single space character What follows are examples of raw IPMI request messages in Terminal Mo...

Page 62: ...ommands with network function codes 2Eh 2Fh and message body transferred in the same manner as for raw IPMI messages see Raw IPMI Messages on page 61 Figure 5 1 PPS Extension Command Request shows an example of a PPS extension command request Figure 5 1 PPS Extension Command Request Figure 5 2 PPS Extension Command Response shows an example of a PPS extension command response Figure 5 2 PPS Extens...

Page 63: ...Get the properties of a serial interface Serial Line Properties Commands Set Serial Interface Properties 0x02 Serial debug and payload interfaces Set the properties of a serial interface Get Debug Level 0x03 Serial debug interface Get debug verbosity level Debug Verbosity Level Set Debug Level 0x04 Serial debug interface Set debug verbosity level Get Payload Communication Timeout 0x09 Serial debug...

Page 64: ...x 00 0A 40 00 The IPMC responds to the Get Status command with the following reply BC xx 00 00 0A 40 00 byte1 byte2 byte3 byte4 Table 5 6 IPMC Status Bits Bit Name Description Byte 1 0 LSB Control If set to 0 the IPMC control over the payload is disabled 1 2 NA Reserved 3 Sensor Alert If set to 1 indicates that at least one of the IPMC sensors detects threshold crossing 4 Reset Alert If set to 1 i...

Page 65: ...e Get Serial Interface Properties command with the following reply BC xx 01 00 0A 40 00 interface properties The interface properties parameter has the bit fields shown in Table 5 8 The interface properties Parameter Bit Fields below Set Serial Interface Properties Command The Set Serial Interface Properties command is used to change the properties of a given interface B8 xx 02 0A 40 00 interface ...

Page 66: ...l Command To change the current debug level the Set Debug Level command must be used This command has the following synopsis B8 xx 04 0A 40 00 debug level Table 5 9 MMC Debug Levels Bit Name Description 0 LSB Error Logging Enable If set to 1 the MMC outputs error diagnostic messages onto the serial debug interface 1 Low level Error Logging Enable If set to 1 the MMC outputs low level error diagnos...

Page 67: ...seconds The default value of the payload communication timeout is specified by the CFG_APP_SIPL_PAYLOAD_TIMEOUT Configuration Parameter Set Payload Communication Timeout Command To change the payload communication timeout the Set Payload Communication Timeout command is used B8 xx 0A 0A 40 00 payload timeout Graceful Payload Reset The MMC supports the Graceful Reboot option of the FRU Control comm...

Page 68: ...g this sequence the payload should send the Graceful Reset command refer to Graceful Payload Reset on page 67 to the MMC over the payload interface to notify the MMC that the payload shutdown is complete To avoid deadlocks that may occur if the payload software does not respond the MMC provides a special timeout for the payload shutdown sequence If the payload does not send the Graceful Reset comm...

Page 69: ...g reply BC xx 2C 00 0A 40 00 geographic address The geographic address parameter has the bit fields shown in Table 5 10 The geographic address Parameter Bit Fields below Table 5 10 The geographic address Parameter Bit Fields Bits Name Description 0 1 GA0 Signal 0 GA0 is grounded 1 GA0 is unconnected 3 GA0 is pulled up 2 3 GA1 Signal 0 GA1 is grounded 1 GA1 is unconnected 3 GA1 is pulled up 4 5 GA2...

Page 70: ...ot loader can be upgraded in field as an HPM 1 upgradeable component HPM 1 Firmware Upgrade The HPM 1 upgrade procedure is managed by a utility called the upgrade agent The ipmitool utility is used as upgrade agent for upgrading the MMC firmware The upgrade agent communicates with the MMC firmware via serial interface or IPMB L and uses the ATCA commands that are described in the HPM 1 Specificati...

Page 71: ...ade Procedure The following images are available from PT hpm1fw img this image contains the MMC firmware hpm1boot img this image contains the boot loader hpm1all img this image contains both the firmware and the boot loader These images can be used to upgrade corresponding components of the IPMC the firmware the boot loader or both The following snapshot samples a command performing firmware upgra...

Page 72: ...The prefix dir option can be used to specify the directory where the resulting files are installed If not specified usr local is used in this case the installation requires root privileges bash configure prefix home user ipmitool 3 Run the make install command to build and install the ipmitool utility bash make install Accessing an MMC with ipmitool The available access methods that can be used to...

Page 73: ... remote transit channel with 0 designating IPMB 0 to which requests should be bridged by the Shelf Manager t MMC address This command line parameter specifies the remote target address IPMB L address of the MMC to which requests should be bridged by the carrier IPMC b 7 This command line parameter specifies the remote target channel with 7 designating IPMB L to which requests should be bridged by ...

Page 74: ... on The supported baud rates are 2400 9600 19200 38400 57600 and 115200 For example to fetch and print Sensor Device Records of an MMC via a serial interface connection with a baud rate of 9600 the following command line should be used ipmitool I serial terminal D dev ttyS0 9600 sdr Using ipmitool for HPM 1 Upgrades The ipmitool utility has built in HPM 1 upgrade functionality and can be used as a...

Page 75: ...ES HPM 1 version 0 Component 0 presence y Component 1 presence y Component 2 presence n Component 3 presence n Component 4 presence n Component 5 presence n Component 6 presence n Component 7 presence n Upgrade undesirable n Aut rollback override n IPMC degraded n Defered1 activation y Service affected y Manual rollback y Automatic rollback y Self test n Upgrade timeout 100 sec Self test timeout 0...

Page 76: ...onds to the boot loader component The select parameter specifies the property that should be acquired The properties are the following 0 General properties 1 Current firmware version 2 Description string 3 Rollback firmware version 4 Deferred firmware version Example ipmitool I lan H 192 168 0 2 A none T 0x82 B 0 t 0x74 b 7 hpm compprop 0 0 PICMG HPM 1 Upgrade Agent 1 0 GENERAL PROPERTIES Payload ...

Page 77: ... 2 A none T 0x82 B 0 t 0x74 b 7 hpm upgrade hpm1fw img Validating firmware image integrity OK Performing preparation stage Services may be affected during upgrade Do you wish to continue y n y OK Target Product ID 15 Target Manufacturer ID 1556 Performing upgrade stage Upgrading AVR AMCm F W with Version Major 0 Minor 5 Aux 000 000 000 000 Writing firmware 100 completed activate Activate the newly...

Page 78: ... none T 0x82 B 0 t 0x74 b 7 hpm rollback PICMG HPM 1 Upgrade Agent 1 0 rollbackstatus Query the rollback status This command can be used to query the firmware on the IPMC about whether a rollback event has occurred ipmitool hpm rollbackstatus Example ipmitool I lan H 192 168 0 2 A none T 0x82 B 0 t 0x74 b 7 hpm rollbackstatus PICMG HPM 1 Upgrade Agent 1 0 Rollback occured1 on component mask 0x01 1...

Page 79: ...n either the payload power is turned on or when the power good indication from the DC to DC converters is false and returns true A power reset also generates a hard reset see Hard Reset on page 80 The AMC131 is held in reset until the PCI Express reference clock FCLKA source is determined The AMC 1 R2 0 specification requires that FCLKA is e keyed The AMC131 is shipped from the factory configured ...

Page 80: ...set the MMC circuitry A Watchdog timer within the MMC can reset the MMC The MMC ICE interface can directly reset the MMC Payload Reset Initiated by the Carrier Board The carrier can reset the MMC directly through the ENABLE_N signal Front Panel Reset Button When the system reset button see Figure 2 1 AMC131 Front Panel on page 23 on the front panel is pressed the AMC131 resets itself Soft Reset So...

Page 81: ...sets The MMC has independent reset sources that do not affect the entire module such as Soft reset for each core Watchdog Timer Peripheral reset The soft reset initiated by the MMC resets each core of the MPC8641D but leaves the processor s peripheral configuration untouched The MPC8641D supports a custom watchdog timer that can be configured to cause an interrupt ...

Page 82: ...Chapter 6 Reset Configuration 82 ...

Page 83: ...tive high Differential signals utilize _N and _P to indicate polarity Binary numbers are represented by a lower case b suffix For example 1010b Hexadecimal numbers are represented by a lower case h suffix All hex letters A F are written in uppercase For example 80BAh Custom Register Summary The AMC131 features 24 custom registers RO indicates that the field has read only access RW indicates that t...

Page 84: ... 1 1d 1h Register 2 2d 2h Register 3 3d 3h Register 4 4d 4h Register 5 5d 5h Register 6 6d 6h Register 7 7d 7h Register 8 8d 8h Register 9 9d 9h Register 10 10d Ah Register 11 11d Bh Register 12 12d Ch Register 13 13d Dh Register 14 14d Eh Register 15 15d Fh Register 16 16d 10h Register 17 17d 11h Register 18 RESERVED reads all zeros Register 19 19 13h Register 20 23 20 23d 14h 17h ...

Page 85: ... CDIMM DDR2 memory module reset 0 to this bit deactivates this reset PHY1_RST Writing 1 to this bit activates the on board quad PHY reset 0 to this bit deactivates this reset Table 7 4 Custom Address Offset 1d 1h Bits 7 6 5 4 3 2 1 0 RO 0 RO 0 RO 0 RO 0 RO 0 RO 0 RO 0 RO 0 cpu_rio_id7 cpu_rio_id6 cpu_rio_id5 cpu_rio_small SW1 4 1 Table 7 5 Custom Address Offset 1d 1h Bits Description Name Descript...

Page 86: ... a hard reset 0 to this bit disables the KILL bit FAIL Writing 1 to this bit causes a hard reset This bit is reset by a power or hard reset that autoclears this bit 0 to this bit has no affect KILL If KILL_EN 1 then writing 1 to this bit causes a hard reset until a power reset occurs 0 to this bit has no affect Table 7 8 Custom Address Offset 3d 3h Bits 7 6 5 4 3 2 1 0 RO 0 RO 0 RO 0 RO 0 RO 0 RO ...

Page 87: ...SMI1 CPU1_ SMI0 Table 7 13 Custom Address Offset 5d 5h Description Name Description CPU1_SMI0 Writing 1 to this bit generates a system management interrupt to core 0 The software must clear this bit in its interrupt service routine 0 this bit clears this bit in the software s interrupt service routine Software must clear this bit CPU1_SMI1 Writing 1 to this bit generates a system management interr...

Page 88: ...O 0 RO 0 RO 0 RO 0 RO 0 RW 0 H RW 0 H SD_CDSWB 0 0 0 0 0 USB_FP_ LED1_BLINK USB_FP_ LED1 Table 7 15 Custom Address Offset 6d 6h Description Name Description USB_FP_LED1 Writing 1 to this bit enables the USB LED on the front panel 0 to this bit turns this LED off USB_FP_LED1_BLINK Writing 1 to this bit changes the USB LED every 46 ms providing 11 on off changes for each second 0 to this bit ensures...

Page 89: ... CORE0_LED_COLOR Writing these bits specifies the corresponding core 0 status LED color as follows 00 Yellow 01 Green 10 Red 11 Off CORE0_LED_BLINK Writing 1 to this bit specifies that the core 0 status LED blinks at 11Hz 0 to this bit specifies that the LED does not blink CORE1_LED_COLOR Writing these bits specifies the corresponding core 1 status LED color 00 Yellow 01 Green 10 Red 11 Off CORE1_...

Page 90: ...0 to this bit disables this feature SBREAK_INT_EN Writing 1 to this bit enables the single break detector A payload processor interrupt IRQ5 is generated to inform the processor that this event has occurred so this processor can take the appropriate action A single break from the RS232 interface indicates that the console port focus is to change to the next processor 0 to this bit disables this in...

Page 91: ...mes out 0 at this bit indicates that watchdog timer does not cause a hard reset pulse when it times out WDOG_KILL_STS_CLR Writing 1 to this bit clears the internal watchdog kill status latch 0 to this bit has no effect Reading 1 at this bit indicates that WDOG_FAIL_EN 1b the watchdog timer has caused a kill and the watchdog timer kill latch is set 0 at this bit indicates that the watchdog timer la...

Page 92: ...atch 0 to this bit has no affect Reading 1 at this bit indicates that the WDOG_INT_EN 1b the watchdog timer has caused an interrupt and the watchdog timer fail latch is set 0 at this bit indicates that the watchdog timer interrupt status is cleared Table 7 22 Custom Address Offset 10d Ah Bits 7 6 5 4 3 2 1 0 RW 00h H WDOG_LDATA Table 7 23 Custom Address Offset 10d Ah Description Name Description W...

Page 93: ... when the watchdog load bit is written with 1 This byte is hexadecimal data and represents a multiple of 256 x 26 mS of time Reading this register returns the value last written to this address or the default value if a power reset has occurred Table 7 26 Custom Address Offset 12d Ch Bits 7 6 5 4 3 2 1 0 RW 0h H RW 0h P USER_REGISTER Table 7 27 Custom Address Offset 12d Ch Description Name Descrip...

Page 94: ...Offset 14d Eh Description Name Description SPI_PARALLEL_WRITE_ DATA Data written to this address is serialized onto the SPI bus by the SPI master if SPI Start 1 otherwise this data is lost data Table 7 31 Custom Address Offset 15d Fh Bits 7 6 5 4 3 2 1 0 R 0 H SPI_READ_DATA Table 7 32 Custom Address Offset 13d Fh Description Name Description SPI_READ_DATA Data read from this location reflects the ...

Page 95: ...hip select enable and must be active for data transfer to occur Table 7 35 Custom Address Offset 17 11h Bits 7 6 5 4 3 2 1 0 RO current value RO 0 CPU_ PCE_ EN_N CPU_ RC_EN_ N CPU_LANE 1 0 0x0 Table 7 36 Custom Address Offset 17 11h Description Name Description CPU_PCE_EN_N This bit reflects the status of the PCI Express port enable signal Reading 0 means the port is enabled 1means the port is dis...

Page 96: ...CPU_COMPORT Reading Writing 0 at this bit means that the serial console port mux selection is controlled by the MMC 1 at this bit means that the board logic tries to override the MMC and force the port to be directed to the MPC8641D IRQ5_ST This is the CPU1 IRQ5 line status for the single break detect interrupt Reading 1 at this bit means there is a single break detect interrupt active in the PAL ...

Page 97: ... DATA 0 1 2 CORE1_FLAG Successfully writing this register causes this bit to change as follows CORE1_FLAG XOR CORE1_FLAG DATA 1 1 2 CORE2_FLAG Successfully writing this register causes this bit to change as follows CORE2_FLAG XOR CORE2_FLAG DATA 2 1 2 CORE3_FLAG Successfully writing this register causes this bit to change as follows CORE3_FLAG XOR CORE3_FLAG DATA 3 1 2 READY Writing 1 to this bit ...

Page 98: ...Chapter 7 Programmable Registers 98 ...

Page 99: ...cifications on page 99 AMC131 Reliability on page 101 Mechanical Specifications on page 102 Electrical and Environmental Specifications The subsequent topics provide tables and illustrations showing the following electrical and environmental specifications AMC131 Absolute Maximum Ratings on page 100 DC Operating Characteristics on page 100 Battery Backup Characteristics on page 101 ...

Page 100: ...for all other options Caution External airflow must be provided at all times during operation to avoid damaging the CPU module PT strongly recommends use of a card rack fan tray to supply the external airflow DC Operating Characteristics Table 8 1 shows power consumption of an AMC131 with a dual core MPC8641D processor operating without AltiVec and with 2GB DDR 400 SDRAM installed Table 8 1 Power ...

Page 101: ...replacement See Return Merchandise Authorization RMA on page 19 for more information about returning merchandise Battery Voltage 3 V Battery Capacity 10 mAh Electrochemical Construction Manganese ML series Lithium battery Battery Socket Location See Figure 4 2 AMC131 Connector Locations on page 47 Caution The AMC131 contains a Manganese lithium battery There is a danger of explosion if the battery...

Page 102: ...Mechanical dimensions are shown in Figure 8 1 and are outlined below Board Length 180 6 mm 7 1 in Board Width 73 5 mm 2 9 in Board Height Mid Size Option 18 96 mm 0 75 in Full Size 1 5 GHz Option 26 85 mm 1 06 in Board Weight 0 34 kg 75 lbs with mid size front panel and 2 GB SDRAM loaded Figure 8 1 AMC131 Board Dimensions 180 6 mm 73 5 mm ...

Page 103: ...Institute ETSI The product described in this manual is designed to meet NEBS Level 3 and ETSI Environmental Criteria GR 63 CORE Network Equipment Building System Requirements Physical Protection GR 1089 CORE Electromagnetic Compatibility and Electrical Safety Generic Criteria for Network Telecommunications Equipment CE Certification The product described in this manual meets the intent of the foll...

Page 104: ...ese limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely...

Page 105: ...n get very hot during normal operation To avoid burns take extra care when removing the module from the chassis soon after shutdown Wait a few minutes to allow the heat sink to cool down Caution Handling the Module It is important to hold the module only by the front panel or PCB edges Avoid touching any components unless necessary to service the product Do not handle the heat sink as this can adv...

Page 106: ...sk of Electric Shock Do not operate in wet damp or condensing conditions Caution Do Not Operate in an Explosive Atmosphere To avoid injury fire hazard or explosion do not operate this product in an explosive atmosphere Caution If Your System Has Multiple Power Supply Sources Disconnect all external power connections before servicing Warning System power supplies must be replaced by qualified servi...

Page 107: ...ervers ipmi spec htm Table 10 1 Related Documents Author Document Name PICMG AdvancedMC 0 Advanced Mezzanine Card Base Specifications PICMG AdvancedMC 1 PCI Express and Advanced Switching PICMG AdvancedMC 2 AMC Gigabit Ethernet 10Gigabit XAUI Ethernet PICMG AdvancedMC 4 Serial Rapid IO IEEE IEEE Std 802 3 2002 CSMA CD Access Method and Physical Layer Specification JEDEC JEDEC Committee JC 42 PC2 4...

Page 108: ...mentation The latest product information and manuals are available on the PT Web site BIOS and driver updates are also available from this site http www pt com Information specific to the AMC131 is available at this URL http pt com content amc131 ...

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