26
Bit 6
This bit, if set to "1" (only if SM2.4 = 1 and
SM2.5 = 1), creates on output AQ1 a series of
impulses 0-5V and frequency equal to the one
selected
on
SM16
(step
motor
final
frequency). The final frequency is reached
after an acceleration ramp whose duration (in
ms) is specified by SM18.
R/W
Bit 7
Not used
-
Bit 8
Only for PL260-12AD
Loading counter of bidirectional encoder 3.
Setting this bit to "1", at the end of scanning
cycle, the counter of encoder3 (32 bit) is
loaded with the value of SMD136. The bit is
changed in OFF at the end of the operation.
R/W
Bit 9
Only for PL260-12AD
Loading counter of bidirectional encoder 4.
Setting this bit to “1”, at the end of scanning
cycle, the counter of encoder4 (32 bit) is
loaded with the value of SMD138. The bit is
changed in OFF at the end of the operation.
R/W
Bit 10 Only for PL260-12AD
Loading counter of bidirectional encoder 5.
Setting this bit to “1, at the end of scanning
cycle, the counter of encoder5 (32 bit) is
loaded with the value of SMD140. The bit is
changed in OFF at the end of the operation.
R/W
SM4
1004
PL260 protocol address offset
This word contains the PL260 protocol address offset.
Its value is added to the one obtained combining the
selection dipswitch addresses (see paragraph 1.6.3).
At start it is fixed to 1.
R/W
SM5
1005
Status of selection dip
This word indicates the position of the selection
dipswitch. If the dipswitch is closed, the correspondent
bit will be automatically set to "1", instead (if opened)
it will be set to "0".
R
Bit 0
This bit shows the status of dipswitch S5-4 for
protocol address selection.
R
Bit 1
This bit shows the status of dipswitch S5-3 for
protocol address selection.
R
Bit 2
This bit shows the status of dipswitch S5-5.
R
Summary of Contents for PL260
Page 1: ...User manual...
Page 2: ...2...
Page 8: ...8 1 4 Size and installation 90 160 mm 43 53 5 45...
