PDP-504CMX/1
153
5
6
7
8
5
6
7
8
C
D
F
A
B
E
CLK
86
I
Shift clock.
DA
91
I / O
Serial data input/output of Sift register pin.
DB
85
I / O
Serial data input/output of Sift register pin.
"L" level: Slew, "H" level: Larch
"H" level: sift register contents of "L" level.
CLR
92
I
LE
87
I
A / B
84
I
Setup pin of sift register sift direction.
OC1
89
I
HVO Output control pin.
HVO Output control pin.
OC2
90
I
HVO
99,100,1-30
46-77
O
High-voltage drive output. (HVO1 - HVO64)
VDD
88
-
Logic power supply.
GND
35-41,82-83
93-94
-
Reference potential 0V (HVO diode anode)
VH1
32,33,96,97
-
HVO1 - 32 High voltage circuit power supply (HVO diode cathode).
VH2
43,44,79,80
-
HVO33 - 64 High voltage circuit power supply (HVO diode cathode).
NC
31,34,41,45
78,81,95,98
-
No.
I/O
Pin Name
Function
Pin Function
NC pin
