DJM-1000
147
5
6
7
8
5
6
7
8
C
D
F
A
B
E
No.
Pin Name
I/O
Pin Function
1
CDOUT
O
Data out (SPI) In SPI mode, CDOUT is the output data from the control port interface on the
CS8420.
2
CS
−
Control Port Chip Select (SPI) A falling edge on this pin puts the CS8420 into SPI control port
mode. In SPI mode, CS is used to enable the control port interface on the CS8420.
3
EMPH
O
Pre-emphasis Indicator Output
4
RXP
I
Differential Line Receiver Inputs, carrying AES3-type data.
5
RXN
I
Differential Line Receiver Inputs, carrying AES3-type data.
6
VA+
−
Positive supply for the analog section. Nom5.0 V.
7
AGND
−
Ground for the analog section.
8
FILT
−
PLL Loop Filter
9
RST
I
Reset Input
10
RMCK
O
Input section recovered master clock output.
Will be at a frequency of 128x or 256x the input sample rate (Fsi).
11
RERR
−
Receiver Error Indicator
12
ILRCK
I/O
Serial Audio Input Port, Left/Right Clock input or output Word rate clock for the audio data on
the SDIN pin. The frequency will be at the input sample rate (Fsi)
13
ISCLK
I
Serial bit clock input or output for audio data on the SDIN pin.
14
SDIN
I
Audio data serial input pin.
15
TCBL
I/O
Transmit Channel Status Block Start
16
OSCLK
I/O
Serial Audio Output Port, Bit Clock input or output
17
OLRCK
I/O
Serial Audio Output Port, Left/Right Clock input or output Word rate clock for the audio data on
the SDOUT pin. The frequency will be at the output sample rate (Fso)
18
SDOUT
O
Audio data serial output
19
INT
O
Interrupt Output
20
U
−
User Data The U pin may optionally be used to input User data for transmission by the AES3
transmitter. Alternatively, the U pin may be set to output User data from the AES3 receiver.
21
OMCK
I
Output section master clock input.
The frequency must be 256x, 384x, or 512x the output sample rate (Fso).
22
DGND
−
Ground for the digital section.
23
VD+
−
Positive supply for the digital section. Nom5.0 V.
24
H/S
−
Hardware or Software Control Mode Select
25
TXN
O
Differential Line driver outputs
26
TXP
O
Differential Line driver outputs
27
CDIN
I
Serial Control data in (SPI)
In SPI mode, CDIN is the input data line for the control port interface
28
CCLK
I/O
Control Port clock
Pin Function
Summary of Contents for DJM-1000
Page 13: ...DJM 1000 13 5 6 7 8 5 6 7 8 C D F A B E ...
Page 21: ...DJM 1000 21 5 6 7 8 5 6 7 8 C D F A B E A 2 4 1 4 A FROM FROM ...
Page 43: ...DJM 1000 43 5 6 7 8 5 6 7 8 C D F A B E CN4 A 4 4 L VISUAL MIDI TX SELECTOR ...
Page 49: ...DJM 1000 49 5 6 7 8 5 6 7 8 C D F A B E CN4012 S CN901 T CN902 W P ...
Page 51: ...DJM 1000 51 5 6 7 8 5 6 7 8 C D F A B E Q CN4002 S CN4001 S CN907 M PANEL2 ASSY DWX2428 Q ...