17
Capacitor Voltage
The capacitor bank is charged by an internal DC-DC converter. It transforms the supply
voltage into a configurable capacitor voltage.
The power conversion is controlled by the interlock input. Setting the interlock to “1” while
the enable signal is “0” will start the capacitor loading procedure. If the enable signal is given
before the interlock, the driver will enter an error condition and no power is transferred into
the capacitors.
The capacitor voltage is controlled by the SETVCAP /
svcap
command. It must be set by the
operator to a value that depends on the chosen pulse width, repetition rate and compliance
voltage. If his value is too low the current will drop during the pulse or not even reach the
setpoint, if it is too high the output stage will heat up fast and lead to an overtemperature
shutdown.
The following equation can be used to calculate the capacitor voltage V
cap
in dependence of
the output current, compliance voltage and pulse width:
))
046
.
0
011
.
0
(
(
5
pulse
LD
LD
cap
T
I
U
V
where
LD
U
Compliance voltage in V
LD
I
Current setpoint in A
pulse
T
Pulse width in s
This equation does not use the repetition rate. Hence, this value must be increased if a current
drop is measured during operation.
If the capacitor voltage is way too high, the output stage can get damaged. It is
safe to start with a lower than required voltage and raise it slowly during operation
until the pulse shape is rectangular.
The storage capacitors provide a high amount of energy. Creating a short cut over the
output clamps is not recommended and might result in an electrical spark and / or fire.
The capacitors are charged up to 34 V. Touching the clamps may result in an electrical
shock and serious injury.
