Rev. 01/2021
35
Register Description
Description of the LSTAT Register
The following list contains a description of the individual LSTAT bits. These can be read with
GETLSTAT and written with SETLSTAT. With SETLSTAT a complete 32 bit word must
always be written. Thus, to change individual bits, first of all the register must be read out
with GETLSTAT, then the desired bits are changed and then passed back with SETLSTAT.
Bit
Name
Read/Write Meaning
0
L_ON
Read/Write Switch on/off the pulse output.
Note
that this bit is automatically set high
each time the driver is powered on.
1-2
TRG_MODE
Read/Write Trigger mode:
0 : external pulse input
1 : internal pulse generator
2 : cw mode
3
TRG_EDGE
Read/Write Currently not used
4
ISOLL_EXT
Read/Write When “1” the external setpoint
current is used
5
INIT_COMPLETE
Read
The power-on test is performed
successfully
6
PULSER_OK
Read
Indicates that the driver is in no
error condition
7
ENABLE_IN
Read/Write When ENABLE_EXT = 1:
Indicates that the external enable is
given
When ENABLE_EXT = 0: Enables
of disables the driver
8
DEF_PWRON
Read/Write When “1” the driver will load the
default values at each power-up.
9
Reserved
Read
Reserved
10
ENABLE_EXT
Read/Write 1: The external enable input of the
BOB interface is used to enable the
driver
0: The ENABLE_IN bit is used
11
Reserved
Read/Write Reserved
12
MASTER_ENABLE_IN
Read
Indicates the state of the MEN input
pin
13
ENABLED
Read
Indicates if the driver is enabled of
not
