Phytec phyCORE-MPC5200B tiny Hardware Manual Download Page 29

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Jumpers

PHYTEC Messtechnik GmbH 2006 L-678e_0

Jumper

Default Comment

Enables or disables the clock output of the I²C RTC U5
RTC clockout is connected to X1B1.

1 + 2

RTC clockout disabled

2 + 3

RTC clockout enabled

Package Type

0R in SMD 0805

J12
J13

Pll_cfg3 = 1
Pll_cfg2 = 1

These jumpers define the core PLL
configuration.

Refer to the "MPC5200B

controller User’s Guide".

The default

configuration 0x08 defines a bus-to-core
clock ratio of 1:3.

1 + 2

Logic 1

2 + 3

Logic 0

Package Type

10 kOhm resistor

in SMD 0805

J8, J9

These jumpers are reserved for factory settings!

Do not change these jumper settings!

Table 3:

Jumper Settings

Summary of Contents for phyCORE-MPC5200B tiny

Page 1: ...A product of a PHYTEC Technology Holding company phyCORE MPC5200B tiny Hardware Manual Preliminary Edition September 2006...

Page 2: ...Messtechnik GmbH offers no guarantee nor accepts any liability for damages arising from the improper usage or improper installation of the hardware or software PHYTEC Messtechnik GmbH further reserves...

Page 3: ...tion 25 6 System Memory 27 6 1 Flash Memory 28 6 2 DDR SDRAM 30 6 3 Serial Memory 31 7 Serial Interfaces 33 7 1 RS 232 Interface 33 7 2 Ethernet Interface 34 7 2 1 PHY Physical Layer Transceiver 34 7...

Page 4: ...oard HD200 56 13 3 1 Power Supply at X1 56 13 3 2 First Serial Interface at Socket P1A 58 13 3 3 Optional Power Supply to External Devices via Socket P1A 60 13 3 4 Second Serial Interface at Socket P1...

Page 5: ...e phyCORE Development Board HD200 51 Figure 11 Numbering of Jumper Pads 53 Figure 12 Location of the Jumpers View of the Component Side 53 Figure 13 Default Jumper Settings of the phyCORE Development...

Page 6: ...nt Placement Bottom View 88 Table 1 Default Port Configuration 9 Table 2 Pinout of the phyCORE Connector X1 18 Table 3 Jumper Settings 21 Table 4 System Start Up Configuration 26 Table 5 Choice of Fla...

Page 7: ...ng the CAN Transceiver on the Development Board with Galvanic Separation 66 Table 24 JP39 CAN Bus Voltage Supply Reduction 67 Table 25 Improper Jumper Settings for the CAN Plug P2A CAN Transceiver on...

Page 8: ...gnment Interfaces for the phyCORE MPC5200B tiny Development Board Expansion Board 78 Table 36 Pin Assignment COP Interface Signals for the phyCORE MPC5200B tiny Development Board Expansion Board 78 Ta...

Page 9: ...lectro Magnetic Conformity of the PHYTEC phyCORE MPC5200B tiny PHYTEC Single Board Computers henceforth products are designed for installation in electrical appliances or as dedicated Evaluation Board...

Page 10: ...ves Users should ensure conformance following any modifications to the products as well as implementation of the products into target systems The phyCORE MPC5200B tiny is one of a series of PHYTEC Sin...

Page 11: ...mately 20 of all pin header connectors on the phyCORE boards to Ground This improves EMI and EMC characteristics and makes it easier to design complex applications meeting EMI and EMC guidelines using...

Page 12: ...Computer in subminiature form factor 53 x 57 mm according to phyCORE specifications all applicable controller and other logic signals extend to two high density 100 pin Molex connectors processor Fre...

Page 13: ...nk controller BDLC Test debug features JTAG IEEE 1149 1 test access port Common on chip processor COP debug port Memory Configuration1 DDR SDRAM 64 MByte to 128 MByte Flash 16 MByte Intel Strata Flash...

Page 14: ...Memory EEPROM 4KByte PS3 UART SPI PSC1 AC97 MPC5200B 33 MHz Quarz p h y C O R E C o n n e c t o r 64 to 128MB DDR SDRAM 133MHz 32 bit PSC2 CAN1 2 PSC 6 UART Power Supply UART3 TTL Ethernet PHY FEC Fas...

Page 15: ...hnik GmbH 2006 L 678e_0 7 1 2 View of the phyCORE MPC5200B tiny RN21 TP8 J3 J7 U15 J8 U2 J2 J1 J6 U6 TP5 J5 X2 XT1 J13 U1 TP1 TP6 J9 XT2 XT3 RN1 U11 J12 U13 D4 U5 U4 U16 Figure 2 View of the phyCORE M...

Page 16: ...3V3 X1 1C 2C 4C 5C 1D 2D GND X1 3C 3D 7C 9D 12C 14D Caution We recommend connecting all available 3V3 input pins to the power supply system on a custom carrier board housing the phyCORE MPC5200B tiny...

Page 17: ...functions are pre configured based on the module s design and are shown in Table 1 Signals that are routed directly from the CPU to the Molex connectors can configured to any available alternative fu...

Page 18: ...connector refer to section 2 This allows the phyCORE MPC5200B tiny to be plugged into any target application like a big chip Figure 3 Pinout of 0the phyCORE MPC5200B tiny Bottom View Table 2 provides...

Page 19: ..._AD2 EXT_AD4 EXT_AD7 EXT_AD9 EXT_AD10 EXT_AD12 EXT_AD15 EXT_AD17 EXT_AD18 EXT_AD20 EXT_AD23 EXT_AD25 EXT_AD26 EXT_AD28 EXT_AD31 I O LocalPlus Address Data Signals 33A ETH_TXD3 O Already used by the MI...

Page 20: ...46A 48A 49A 50A PCI_RESET PCI_GNT PCI_CBE_3 PCI_CBE_2 PCI_IRDY PCI_DEVSEL PCI_PERR PCI_SERR PCI_CBE_1 O O O O O O O O O Dedicated PCI Signals Reset output open drain Bus grant Command byte enable 3 Co...

Page 21: ...15B 16B 17B 18B 20B 21B 22B 23B 25B 26B 27B EXT_AD0 EXT_AD3 EXT_AD5 EXT_AD6 EXT_AD8 EXT_AD11 EXT_AD13 EXT_AD14 EXT_AD16 EXT_AD19 EXT_AD21 EXT_AD22 EXT_AD24 EXT_AD27 EXT_AD29 EXT_AD30 I O LocalPlus Add...

Page 22: ...s 40B 42B 43B 45B 46B 47B 48B 50B PCI_CLOCK PCI_REQ PCI_IDSEL PCI_FRAME PCI_TRDY PCI_STOP PCI_PAR PCI_CBE_0 O O O O I O O O Dedicated PCI Signals PCI and external peripheral clock PCI bus request Init...

Page 23: ...and no device should use SRESET in a way that interferes with any bus operation in progress SRESET can also be asserted by internal sources When SRESET is asserted internally external SRESET is also a...

Page 24: ...t Speed LED H 10 Mbit s L 100 Mbit s Differential receive input Differential transmit output Power down Collision LED H no collision 39C 40C COP_TRST CK_STOP I O JTAG Interface JTAG reset input Via lo...

Page 25: ...Reset input signal of the MPC5200B tiny It could be asserted via connection to a reset push button Signal connected to 3V3 via 10 kOhm pull up resistor 11D GPIO_WKUP_7 I O Dedicated GPIO with wakeup c...

Page 26: ...SPI_MOSI SPI_MISO SPI_CLK SPI_SS I O I O I O O SPI Interface PSC3 SPI master out slave in SPI master in slave out SPI clock SPI slave select 32D I2C1_IO I O Data line of first I2C interface SDA 33D IR...

Page 27: ...llustrates the numbering of the jumper pads while Figure 5 indicates the location of the jumpers on the board 1 2 3 1 2 3 4 6 7 8 9 1 2 1 2 open closed 1 2 3 4 5 6 Figure 4 Numbering of the Jumper Pad...

Page 28: ...y at U4 to 3V3 On many memory devices pin 7 enables the activation of a write protect function It is not guaranteed that the standard serial memory populating the phyCORE MPC5200B tiny will have this...

Page 29: ...abled Package Type 0R in SMD 0805 J12 J13 Pll_cfg3 1 Pll_cfg2 1 These jumpers define the core PLL configuration Refer to the MPC5200B controller User s Guide The default configuration 0x08 defines a b...

Page 30: ...phyCORE MPC5200B tiny 22 PHYTEC Messtechnik GmbH 2006 L 678e_0...

Page 31: ...nd connecting all GND pins neighboring signals which are being used in the application circuitry Optional Supply Input VBAT VBAT is the input pin that supplies the Real Time Clock U5 The MAX6364 batte...

Page 32: ...iates a reset cycle if any operating voltage drops below its minimum threshold value After all voltages reach their required value the supervisor chip adds an additional 200 ms delay until the PoReset...

Page 33: ...onfiguration The configuration circuitry pull up or pull down resistors is located on the phyCORE module The system start up configuration includes Clock configuration Basic LocalPlus characteristic f...

Page 34: ...Bit 1 fvcosys 2 x fsystem ETH_TXEN boot_rom_mg 0 Bit 0 No boot in most graphics mode 1 Bit 1 Boot in most graphics mode ETH_TXD1 ppc_msrip 1 Bit 0 0000_0100 hex boot address Bit 1 FFF0_0100 hex boot a...

Page 35: ...ial memory EEPROM The Flash memory is connected to the PowerPC LocalPlus bus and is controlled by CS0 This Chip Select signal is used for boot operation The DDR SDRAM is connected to the special SDRAM...

Page 36: ...for boot purposes The MPC5200B s LocalPlus bus can be configured for many different bus modes For CS0 the 25 bit address 16 bit data multiplexed mode was chosen because it offers the largest address...

Page 37: ...lation The equation for access time calculation is 2 WS tPCICK 8 5 ns To support all memory speed grades up to 75 ns at least 4 wait states must be added for CS0 4 wait states for CS0 supports 66 MHz...

Page 38: ...16 bit data port devices connected in parallel to support the 32 bit bus width of the processor The memory bank is controlled by Chip Select signal SD_CS0 of the processor s DDR SDRAM controller Table...

Page 39: ...memory device is connected to I C interface 2 Table 7 gives an overview of the possible devices for use at U4 as of the printing of this manual Type Size I2 C Frequency Address Pins Write Cycles Life...

Page 40: ...2 C Address J5 A1 J6 A2 0xA0 0xA1 1 2 2 3 0xA4 0xA5 2 3 2 3 0xA8 0xA9 1 2 1 2 0xAC 0xAD 2 3 1 2 Table 8 Serial Memory I2 C Address Examples Address lines A1 and A2 are not always made available with c...

Page 41: ...processor s on chip UART supports handshake signal communication Use of an RS 232 signal level in support of handshake communication requires use of an external RS 232 transceiver not located on the...

Page 42: ...se T and 100Base T networks The 10 100Base T interface with its LED monitoring signals extends to phyCORE connector X1 In order to connect the module to an existing 10 100Base T network some external...

Page 43: ...Speed LED output H LED off 10BT L LED on 100BT X1C34 ETH_LED3 Collision LED output H LED off no collision L LED on collisions X1C41 Table 9 Signal Definition PHY Ethernet Port U2 7 2 2 MAC Address In...

Page 44: ...e supports full speed 12 Mbit s transmission rates The USB 1 1 controller is integrated in the MPC5200B processor The physical layer transceiver unit must be connected externally it is not populated o...

Page 45: ...ontroller on the phyCORE MPC5200B tiny Clock Core 396 MHz IPB 132 MHz PCI 66 MHz Memory Base Address Register MBAR 0xF0000000 DDR RAM Automatic storage size detection start address 0x0 Flash Chip Sele...

Page 46: ...phyCORE MPC5200B tiny 38 PHYTEC Messtechnik GmbH 2006 L 678e_0 8 2 System Resources Required by U Boot Under Construction...

Page 47: ...00 0xFFF0 0000 0xFFF4 0000 U Boot Sector 120 U Boot Sector 121 0xFFFF FFFF Flash 32MByte 0x0400 0000 0x0000 3000 0x0000 0100 0x03FB 0000 U Boot is working from here STACK counting down Trap table 0x00...

Page 48: ...phyCORE MPC5200B tiny 40 PHYTEC Messtechnik GmbH 2006 L 678e_0 8 3 Modifying the U Boot Loader Under Construction...

Page 49: ...s a 2 0 mm pin pitch instead of 2 54 mm The connector is not populated on the standard version of the phyCORE MPC5200B You can order a specific debug version of the module denoted by the D part number...

Page 50: ...phyCORE MPC5200B tiny 42 PHYTEC Messtechnik GmbH 2006 L 678e_0...

Page 51: ...fications The physical dimensions of the phyCORE MPC5200B tiny are represented in Figure 8 57m m 53 84m m 52 36m m 4m m 3 7m m 3 7m m 3 96m m 2 35m m 2 35m m 14m m 19 37m m 2 35m m 53m m 49 67m m 45 7...

Page 52: ...2 5 mm Additional Technical Data Parameter Condition Characteristics Dimensions 57 mm x 53 mm Weight approximately 25g with all optional components mounted on the circuit board Storage Temp Range 40...

Page 53: ...stance between the two connected PCBs when the module is mounted on the corresponding carrier board In order to get the exact spacing the maximum component height 2 5 mm on the underside of the phyCOR...

Page 54: ...ts can be removed with the solder iron tip Alternatively a hot air gun can be used to heat and loosen the bonds Caution If any modifications to the module are performed regardless of their nature the...

Page 55: ...via the I2 C bus address 0xA2 0xA3 Since the MPC5200B is equipped with an internal I2 C controller the I2 C protocol is processed very effective without extensive processor action refer also to sectio...

Page 56: ...78e_0 For more information on the features of the RTC 8564 refer to the corresponding Data Sheet Note After connection of the supply voltage the Real Time Clock generates no interrupt The RTC must fir...

Page 57: ...ard Computer module The Development Board design allows easy connection of additional expansion boards featuring various functions that support fast and convenient prototyping and software evaluation...

Page 58: ...on board signals provided by the SBC module mounted on the Development Board are broken out 1 1 to the expansion board by means of its patch field 7 The required connections between SBC module Develop...

Page 59: ...y P1 dual DB 9 sockets for serial RS 232 interface connectivity P2 dual DB 9 connectors for CAN or RS 485 interface connectivity X4 voltage supply for external devices and subassemblies X5 GND connect...

Page 60: ...or current Maximum signal input values are indicated in the corresponding controller User s Manual Data Sheets As damage from improper connections varies according to use and application it is the use...

Page 61: ...are configured for use with the phyCORE MPC5200B tiny by means of removable jumpers If no jumpers are set no signals connect to the DB 9 connectors the control and display units and the CAN transceive...

Page 62: ...hyCORE MPC5200B tiny standard MPC5200B controller use of first and second RS 232 both CAN interfaces and LED D3 on the Development Board Jumper settings for other functional configurations of the phyC...

Page 63: ...upport an RS 485 interface For this reason the corresponding jumper settings must never be used Jumper Setting Description JP30 closed TxD signal for second serial interface routed to pin 8 on the DB...

Page 64: ...depending on user needs 13 3 1 Power Supply at X1 Caution Only use the included power adapter to supply power to the Development Board Do not change modules or jumper settings while the Development Bo...

Page 65: ...y main supply voltage for the phyCORE MPC5200B tiny JP16 open phyCORE MPC5200B tiny not connected to secondary main supply voltage Table 15 JP9 JP16 Improper Jumper Settings for the Main Supply Voltag...

Page 66: ...P21 open Pin 9 of DB 9 socket P1A not connected JP22 open Pin 7 of DB 9 socket P1A not connected JP23 open Pin 4 of DB 9 socket P1A not connected JP24 open Pin 6 of DB 9 socket P1A not connected JP25...

Page 67: ...ORE modules 1 2 Pin 4 of DB 9 socket P1A connected with SPI_MOSI signal from phyCORE MPC5200B tiny JP23 2 3 Pin 4 of DB 9 socket P1A connected with bootstrap activation circuitry used on other phyCORE...

Page 68: ...This allows for easy and secure supply of external devices connected to P1A This power supply option especially supports connectivity to analog and digital modems Such modem devices enable global com...

Page 69: ...ds the limiting value that can be provided by the phyCORE Development Board HD200 the voltage at pin 6 will be switched off immediately This prevents damage to the phyCORE Development Board HD200 as w...

Page 70: ...y JP2 open Pin 9 of DB 9 socket P1B not connected JP3 open Pin 7 of DB 9 socket P1B not connected JP4 open Pin 4 of DB 9 socket P1B not connected JP5 open Pin 6 of DB 9 socket P1B not connected JP6 op...

Page 71: ...ket P1B connected with UART6_CTS_TTL from phyCORE MPC5200B tiny JP4 closed Pin 4 of DB 9 socket P1B connected with I2C2_CLK from phyCORE MPC5200B tiny JP5 closed Pin 6 of DB 9 socket P1B connected wit...

Page 72: ...7 of the DB 9 plug P2A is connected to CAN_H1 from transceiver on the Development Board HD200 JP11 2 4 Input at opto coupler U4 on the phyCORE Development Board HD200 connected with CAN1_TX of the ph...

Page 73: ...d is connected to EXT_AD30 of the phyCORE MPC5200B tiny JP11 open Input at opto coupler U4 on the Development Board not connected 1 2 Output at opto coupler U5 on the Development Board is connected to...

Page 74: ...11 2 4 Input at opto coupler U4 on the phyCORE Development Board HD200 connected with CAN1_TX of the phyCORE MPC5200B tiny JP12 2 4 Output at opto coupler U5 on the phyCORE Development Board HD200 con...

Page 75: ...nfigured in order to routed the applicable voltage to the CAN voltage regulator at U8 on the Development Board VCAN_IN JP39 7 V 18 V 1 2 18 V 23 V 2 3 23 V 28 V open Table 24 JP39 CAN Bus Voltage Supp...

Page 76: ...CORE MPC5200B tiny JP11 open Input at opto coupler U4 on the Development Board not connected 1 2 Output at opto coupler U5 on the Development Board is connected to SPI_MOSI of the phyCORE MPC5200B tin...

Page 77: ...opment Board HD200 JP34 1 2 Pin 7 of the DB 9 plug P2B is connected to CAN_H2 of CAN transceiver U3 of the Development Board HD200 JP14 2 4 Input at opto coupler U6 on the Development Board connected...

Page 78: ...ed to SPI_SS of the phyCORE MPC5200B tiny 2 3 Input at opto coupler U6 on the Development Board is connected to EXT_AD31 of the phyCORE MPC5200B tiny JP14 open Input at opto coupler U6 on the Developm...

Page 79: ...of the phyCORE MPC5200B tiny JP15 2 4 Output at opto coupler U7 on the Development Board connected to CAN2_RX of the phyCORE MPC5200B tiny JP13 1 2 Supply voltage for CAN transceiver and opto coupler...

Page 80: ...yCORE MPC5200B tiny 2 3 Input at opto coupler U6 on the Development Board is connected to EXT_AD31 of the phyCORE MPC5200B tiny JP14 open Input at opto coupler U6 on the Development Board not connecte...

Page 81: ...As described in section 13 1 all signals from the phyCORE MPC5200B tiny extend in a strict 1 1 assignment to the Expansion Bus connector X2 on the Development Board These signals in turn are routed in...

Page 82: ...ng scheme for Expansion Bus connector and patch field matrices differs from that of the phyCORE connector as shown in the following two figures B A D C 80 1 80 1 Figure 22 Pin Assignment Scheme of the...

Page 83: ...B 12B 31F Ext_AD7 13A 13A 32A Ext_AD8 13B 13B 32C Ext_AD9 14A 14A 32E Ext_AD10 15A 15A 32B Ext_AD11 15B 15B 32F Ext_AD12 16A 16A 33A Ext_AD13 16B 16B 33C Ext_AD14 17B 17B 33E Ext_AD15 18A 18A 33B Ext_...

Page 84: ...Signals phyCORE MPC5200B tiny Development Board Expansion Board Signal phyCORE Module Expansion Bus Patch Field Pci_Reset 40A 40A 40F Pci_Clock 40B 40B 41A Pci_Gnt 41A 41A 41E Pci_Req 42B 42B 41F Pci...

Page 85: ...Signal phyCORE Module Expansion Bus Patch Field AC97_1_Sdata_In 16C 16C 5F AC97_1_Sdata_O 15D 15D 5B AC97_1_Res 13C 13C 4F AC97_1_Sync 14C 14C 5C AC97_1_Bitclk 15C 15C 5E TXD6 232 23C 23C 8A RXD6 232...

Page 86: ...TXN 49C 49C 16F USB1_RXD 47D 47D 16C USB1_RXP 48D 48D 16B USB1_RXN 48C 48C 16E USB1_Suspend 46C 46C 15F USB1_PortPwr 45D 45D 15B USB1_Overcnt 45C 45C 15E USB1_Speed 46D 46D 16A Table 35 Pin Assignment...

Page 87: ...5 30C 30C 10E Timer6 44C 44C 15C Timer7 43D 43D 15A RESIN 10D 10D 3F HReset 11C 11C 4E SReset 10C 10C 3D RESOUT 7D 7D 2F GPIO6 9C 9C 3B GPIO7 11D 11D 4A RTC_CLKOUT 1B 1B 28C IRQRTC 33D 33D 11B FL_VPEN...

Page 88: ...A 32A 37A 42A 47A 52A 57A 62A 67A 72A 77A 4B 9B 14B 19B 24B 29B 34B 39B 44B 49B 54B 59B 64B 69B 74B 79B 3C 7C 12C 17C 22C 27C 32C 37C 42C 47C 52C 57C 62C 67C 72C 77C 3D 9D 14D 19D 24D 29D 34D 39D 44D...

Page 89: ...74C 75C 76C 78C 79C 80C 4D 5D 7D 8D 51D 53D 54D 55D 56D 58D 59D 60D 61D 63D 64D 65D 66D 68D 69D 70D 71D 73D 74D 75D 76D 78D 79D 80D 18A 19A 20A 21A 22A 23A 24A 25A 26A 27A 45A 46A 47A 48A 49A 50A 51A...

Page 90: ...ial Number can be imple mented in various software applications for the definition of a node address or as copy protection in networked applications The DS2401 can be soldered on space U10 or U9 on th...

Page 91: ...3 11Pin Header Connector X4 The pin header X4 on the Development Board enables connection of an optional modem power supply Connector X4 supplies 5 V at pin 1 and provides the phyCORE Development Boar...

Page 92: ...phyCORE MPC5200B tiny 84 PHYTEC Messtechnik GmbH 2006 L 678e_0...

Page 93: ...connection of the phyCORE MPC5200B tiny mounted on a Development Board HD200 to a 10 100Base T network Figure 26 Ethernet Transformer Module Connector The pinout for the Ethernet transformer connector...

Page 94: ..._0 PCM 030 PCB 1245 0 PCM 997 V2 PCB 1179 5 6 First draft Preliminary documentation phyCORE MPC5200B tiny in Prototype state 05 Sep 2006 Manual L 678e_1 PCM 030 PCB 1245 1 PCM 997 V2 PCB 1179 5 Second...

Page 95: ...CB207 R69 R6 J1 R23 J6 U6 TP5 R2 C37 J5 R67 D8 R10 CB301 CB306 C3 C4 R35 X2 CB313 R39 R14 XT1 R22 J13 R1 R16 R19 C32 CB300 R30 R54 CB304 C31 R26 CB208 C5 U1 C11 TP1 C2 R28 R20 R65 RN21 C13 R41 R34 R17...

Page 96: ...7 R50 CB102 C29 R31 C44 C22 C18 C17 R46 R37 R12 CB205 TP4 R49 R56 R33 CB105 CB103 C24 L6 C46 CB310 CB204 CB305 C49 L2 CB104 TP3 C50 L5 CB311 C34 CB100 L4 CB101 C16 U8 R58 CB107 TP2 U12 CB106 C48 C45 U...

Page 97: ...OM 27 EEPROM serial 31 EMC 1 ESD 1 Ethernet Interface 35 Expansion Bus 74 F Fast Ethernet Controller 35 Features 4 FEC 35 First CAN Interface 65 First Serial Interface 59 Flash 5 27 Start Address 28 F...

Page 98: ...23 Power Supply 8 57 Power Supply to External Devices via Socket P1A 61 R Real Time Clock 48 Reset 24 Reset Button 54 RS 232 TTL Signals 20 RS 232 Interface 34 RTC 21 23 31 48 RTC Interrupt 48 RTC_CL...

Page 99: ...Index PHYTEC Messtechnik GmbH 2006 L 678e_0 91 UART 34 USB Full Speed 37 USB 1 1 37 USB Host 37 USB1 1 Interface 37 V VBAT 23 Voltage Supervision 24 Voltage Supervisor 24 X X2 43...

Page 100: ...phyCORE MPC5200B tiny 92 PHYTEC Messtechnik GmbH 2006 L 678e_0...

Page 101: ...PHYTEC Messtechnik GmbH 2006 L 678e_0 93 A Appendix A 1 Release Notes The following section contains information about deviations to the description in this manual Revisions to previous manuals are al...

Page 102: ...phyCORE MPC5200B tiny 94 PHYTEC Messtechnik GmbH 2006 L 678e_0...

Page 103: ...tiny Document number L 678e_0 Preliminary Edition September 2006 How would you improve this manual Did you find any mistakes in this manual page Submitted by Customer number Name Company Address Retur...

Page 104: ...Published by PHYTEC Messtechnik GmbH 2006 Order No L 678e_1 Printed in Germany...

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