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Pin Description
©
PHYTEC Messtechnik GmbH 2006 L-678e_0
11
Pin Number
Signal
I/O
Comments
Pin Row X1A
1A NC
-
Not
connected
2A, 7A, 12A,
17A, 22A, 27A,
32A, 37A, 42A,
47A
GND
-
Ground 0 V
3A
/IRQ3
I
Interrupt input 3 of the processor.
4A
/IRQ0
I
Interrupt input 0 of the processor.
5A
6A
8A
29A
30A
31A
/LP_CS1
/LP_ALE
/LP_RD#WR
/LP_Ts
/LP_Cs4
/LP_Cs6
O
O
O
O
O
O
LocalPlus Bus control signals
Chip Select 1
Address Latch Enable
Read, not Write
Transfer Start
Chip Select 4
Chip Select 6 (PSC3 is UART3)
9A
10A
11A
13A
14A
15A
16A
18A
19A
20A
21A
23A
24A
25A
26A
28A
EXT_AD1
EXT_AD2
EXT_AD4
EXT_AD7
EXT_AD9
EXT_AD10
EXT_AD12
EXT_AD15
EXT_AD17
EXT_AD18
EXT_AD20
EXT_AD23
EXT_AD25
EXT_AD26
EXT_AD28
EXT_AD31
I/O
LocalPlus Address/Data Signals
33A ETH_TXD3
O
Already
used
by the MII interface between
CPU and Ethernet PHY. Could be used as
J1850_TX
signal, if the PHY is not populated
or in "isolation mode".
The pin state is latched by the CPU after reset
and used as "byte lane swap" configuration.
Refer to section 5, "System Start-Up
Configuration"
. There is a 10kOhm pull-
down resistor on this signal..
34A
35A
36A
38A
39A
ATA_CS_0
ATA_CS_1
ATA_IOCHRDY
/ATA_IOR
ATA_INTRQ
O
O
O
I
ATA Interface Signals
Timer Port configured as ATA_CS (Timer0)
Timer Port configured as ATA_CS (Timer1)
ATA negated to extend transfer
ATA read
ATA interrupt request
Summary of Contents for phyCORE-MPC5200B tiny
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Page 104: ...Published by PHYTEC Messtechnik GmbH 2006 Order No L 678e_1 Printed in Germany...