IC Data Sheets
8.
Figure 8-16 Pin configuration
19490_
3
15_1
3
041
3
.ep
s
1
3
041
3
Pinnin
g
information
PNX5
8
XXX [14/16]
AC24
S
CL_MC
I/O
I2C
3
V, 5 VT, OD
S
y
s
tem Controller I
2
C Clock
s
l
u
P
V
3
.
3
S
O
M
C
O
1
M
W
P
5
2
C
A
e Width Mod
u
l
a
tor O
u
tp
u
t
t
n
o
C
m
e
t
s
y
S
s
n
1
,
V
3
.
3
S
O
M
C
O
N
E
S
P
6
2
C
A
roller Em
u
l
a
tion control – Progr
a
m
S
tore En
ab
le
AD1
I2
S
_OUT_
S
CK
I/O
CMO
S
3
.
3
V
Digit
a
l A
u
dio O
u
tp
u
t
S
eri
a
l Clock
AD2
I2
S
_OUT_W
S
I/O
CMO
S
3
.
3
V
Digit
a
l A
u
dio O
u
tp
u
t Word
S
elect
AD
3
VDD_1V15
PWR
su
pply
AD4
I2
S
_OUT_O
S
CLK
O
CMO
S
3
.
3
V
Digit
a
l A
u
dio O
u
tp
u
t Over
sa
mple Clock
AD5
BL_PWM
O
CMO
S
3
.
3
V
B
a
ck light PWM
t
h
g
i
R
–
2
o
i
d
u
A
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
O
4
C
A
D
A
6
D
A
t
f
e
L
–
1
o
i
d
u
A
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
O
1
C
A
D
A
7
D
A
AD
8
VREF_AADC
O
a
n
a
log A
u
dio ADC Reference
l
e
n
n
a
h
c
t
f
e
L
-
4
t
u
p
n
I
o
i
d
u
A
V
5
.
2
g
o
l
a
n
a
I
L
4
N
I
A
9
D
A
l
e
n
n
a
h
c
t
f
e
L
-
2
t
u
p
n
I
o
i
d
u
A
V
5
.
2
g
o
l
a
n
a
I
L
2
N
I
A
0
1
D
A
AD11
CVB
S
_Y7
I
a
n
a
log 2.5 V
An
a
log Video Inp
u
t 7
F
I
l
a
t
i
g
i
D
m
o
r
f
r
e
n
u
T
r
o
f
l
o
r
t
n
o
C
n
i
a
G
V
5
.
2
g
o
l
a
n
a
O
C
G
A
_
F
I
2
1
D
A
4
t
u
p
n
I
o
e
d
i
V
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
I
4
C
3
1
D
A
2
t
u
p
n
I
o
e
d
i
V
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
I
2
B
_
B
P
4
1
D
A
1
t
u
p
n
I
o
e
d
i
V
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
I
1
B
_
B
P
5
1
D
A
t
u
p
n
i
o
e
d
i
v
A
G
V
Y
r
o
G
V
5
.
2
g
o
l
a
n
a
I
5
G
6
1
D
A
AD17
V
SS
_XTAL
PWR
a
n
a
log power
a
nd gro
u
nd
com
b
o
3
.
3
V
Gro
u
nd for XTAL o
s
cill
a
tor
AD1
8
P0_2
I/O
CMO
S
3
.
3
V, 1 n
s
Gener
a
l P
u
rpo
s
e I/O Port 0
b
it 2
AD19
P1_0
I/O
CMO
S
3
.
3
V, 1 n
s
Gener
a
l P
u
rpo
s
e I/O Port 1
b
it 0
AD20
P2_1
I/O
CMO
S
3
.
3
V, 1 n
s
Gener
a
l P
u
rpo
s
e I/O Port 2
b
it 1
AD21
P2_7
I/O
CMO
S
3
.
3
V, 1 n
s
Gener
a
l P
u
rpo
s
e I/O Port 2
b
it 7
AD22
P
3
_5
I/O
CMO
S
3
.
3
V, 1 n
s
Gener
a
l P
u
rpo
s
e I/O Port
3
b
it 5
AD2
3
P5_0
I
a
n
a
log
3
.
3
V
ADC Inp
u
t 0
AD24
S
CL_VGA_EDID
I/O
I2C
3
V, 5 VT, OD
I
2
C Clock Inp
u
t for VGA EDID
AD25
S
DA_VGA_EDID
I/O
I2C
3
V, 5 VT, OD
I
2
C D
a
t
a
Inp
u
t for VGA EDID
s
l
u
P
V
3
.
3
S
O
M
C
O
0
M
W
P
6
2
D
A
e Width Mod
u
l
a
tor O
u
tp
u
t
AE1
I2
S
_OUT_
S
D1
O
CMO
S
3
.
3
V
Digit
a
l A
u
dio O
u
tp
u
t
S
eri
a
l D
a
t
a
1
AE2
VDD_1V15
PWR
su
pply
AE
3
I2
S
_OUT_
S
D
3
O
CMO
S
3
.
3
V
Digit
a
l A
u
dio O
u
tp
u
t
S
eri
a
l D
a
t
a
2
AE4
RE
S
ET_
S
Y
S
O
CMO
S
3
.
3
V
S
y
s
tem re
s
et o
u
tp
u
t
AE5
S
PDIF_IN1
I
CMO
S
3
.
3
V, PD
S
PDIF Digit
a
l A
u
dio Inp
u
t 1
t
f
e
L
–
3
o
i
d
u
A
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
O
5
C
A
D
A
6
E
A
t
h
g
i
R
–
1
o
i
d
u
A
g
o
l
a
n
A
V
5
.
2
g
o
l
a
n
a
O
2
C
A
D
A
7
E
A
l
e
n
n
a
h
c
t
h
g
i
R
-
5
t
u
p
n
I
o
i
d
u
A
V
5
.
2
g
o
l
a
n
a
I
R
5
N
I
A
8
E
A
l
e
n
n
a
h
c
t
f
e
L
-
3
t
u
p
n
I
o
i
d
u
A
V
5
.
2
g
o
l
a
n
a
I
L
3
N
I
A
9
E
A
B
a
ll
S
ym
b
ol
P
a
d
direc-
tion
P
a
d type
De
s
cription