Panasonic UF-5500, Service Manual

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65
UF-5500 / 4500
6.15.3. DEV DC BIAS UNIT
When CHG REM is “L”, 5.425kHz PWM (Pulse Width Modulation) is input from IC300 to DEV CLK through Q504, developing
voltage corresponding to the DUTY of PWM signal is output from DEV OUTPUT. Also DUTY is adjusted by the utilization of the
developing unit and environmental temperature.
6.15.4. DEV AC BIAS UNIT
330 Vp-p 34 kHz wave of developing AC voltage is output from DEV OUTPUT. This voltage is overlapped with developing DC
voltage and output as AC voltage that includes the development DC voltage.
6.15.5. TRA (+) BIAS (Transfer (+) BIAS)/TRA (-) BIAS (Transfer (-) BIAS) UNIT
When CHG REM is “L” and TRA CLK is “open”, Charge BIAS (200
µ
A) is output from CHG OUTPUT, and at the same time
Transfer (+) BIAS (785V) is output from TRA OUTPUT. When 5.086kHz PWM (Pulse Width Modulation) signal is input to TRA
CLK through transistor Q501, Transfer (-) CURRENT BIAS corresponding to PWM signal is output from TRA OUTPUT.
T
duty=
τ
/ T (%)
100% 72%
+50V
0 %
DEV CLK wave form
τ
+300V
Transfer Current Variation by PWM Input
20%
+230V
T
duty=
τ
/ T (%)
100% 72%
-4 A
0 %
TRA CLK wave form
τ
-25 A
Transcription current variation corresponding to PWM input
35%
-15 A