2-5
Pin No.
Signal name
IN/OUT
Functions
H 20
IRQ0
OUT
System timer interrupt signal being output.
J 20
IRQ1
IN
Mask enabled interrupt request signal. (
←
Keyboard controller)
Active : High
T 09
IRQ3
IN
Mask enabled interrupt request signal. (
←
Serial port 2)
Active : High
W 09
IRQ4
IN
Mask enabled interrupt request signal. (
←
Serial port 1)
Active : High
U 08
IRQ5
IN
Mask enabled interrupt request signal.
Active : High
V 08
IRQ6
IN
Mask enabled interrupt request signal. (
←
FDC)
Active : High
Y 08
IRQ7
IN
Mask enabled interrupt request signal. (
←
Parallel port 1)
Active : High
Y 20
IRQ8#/GPI6
IN/OUT
Mask enabled interrupt request signal. (
←
For RTC)
Active : Low
U 01
IRQ9
IN
Mask enabled interrupt request signal. (
←
ETHERNET)
Active : High
U 12
IRQ10
IN
Mask enabled interrupt request signal. (
←
Serial port 4)
Active : High
W 13
IRQ11
IN
Mask enabled interrupt request signal. (
←
Serial port 3)
Active : High
T 13
IRQ12/M
IN
Mask enabled interrupt request signal. (
←
PS/2 mouse)
Active : High
V 14
IRQ14
IN
Mask enabled interrupt request signal. (
←
E-IDE)
Active : High
Y 14
IRQ15
IN
Mask enabled interrupt request signal.
Active : High
K 01
KBCCS#/GPO26
OUT
Chip select signal to the keyboard controller.
Active : Low
Y 15
T 14
W 14
U 13
V 13
Y 13
T 12
LA17
LA18
LA19
LA20
LA21
LA22
LA23
IN/OUT
ISA An address bus not latched yet.
N 04
MCCS#
OUT
I/O An output that is active with I/O address 62h and 66h.
Active : Low
Y 12
MEMCS16#
IN
ISA Used to specify the data bus width of the memory. Low
→
16-bit, High
→
8-bit.
V 15
MEMR#
IN/OUT
ISA The read signal to the memory device. (All area)
Active : Low
U 15
MEMW#
IN/OUT
ISA The write signal to the memory device. (All area)
Active : Low
L 20
NMI
OUT
Non-maskable interrupt lower than SMI#. (
→
CPU)
J 01
J 02
OC0#
OC1#
IN
Overcurrent detector pin of the USB port.
V 11
OSC
IN
Clock input for timer counter (8254). Fixed at 14.3181MHz.
B 06
PAR
OUT
PCI PCI Bus parity signal.
D 11
PCICLK
IN
PCI Clock signal for the PCI bus. 33MHz/30MHz
E 10
A 11
B 11
C 11
PCIREQA#
PCIREQB#
PCIREQC#
PCIREQD#
IN
PCI Bus request signal.
Active : Low
A 01
PCIRST#
OUT
PCI Asynchronous reset signal.
Active : Low
R 02
PCI_STP#
OUT
Clock stop request signal for PCI. (
→
Clock synthesizer)
Active : Low
L 04
N 05
PCS0#
PCS1#
OUT
Programmable chip select signal.
Active : Low
G 16
G 18
G 17
PDA0
PDA1
PDA2
OUT
E-IDE Primary side address.
H 17
PDCS1#
OUT
The signal that is active with I/O address 01F0-01F7h of E-IDE.
Active : Low
H 16
PDCS3#
OUT
The signal that is active with I/O address 03F6-03F6h of E-IDE.
Active : Low
F 20
E 18
E 20
D 18
D 20
C 20
B 20
A 20
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
IN/OUT
E-IDE Primary data bus.
Summary of Contents for JS-170FR Series
Page 2: ......
Page 10: ......
Page 30: ...1 20 ...
Page 80: ...2 50 ...
Page 101: ...3 17 LCD DISPLAY TEST 6 Video Test ENTER 1 OK or 2 NG ...
Page 134: ...4 JS 170FR PCB s 4 1 Main PCB 4 1 1 Main PCB Schematic Diagram 1 10 4 1 ...
Page 135: ...4 1 1 Main PCB Schematic Diagram 2 10 4 2 ...
Page 136: ...4 1 1 Main PCB Schematic Diagram 3 10 4 3 ...
Page 137: ...4 1 1 Main PCB Schematic Diagram 4 10 4 4 ...
Page 138: ...4 1 1 Main PCB Schematic Diagram 5 10 4 5 ...
Page 139: ...4 1 1 Main PCB Schematic Diagram 6 10 4 6 ...
Page 140: ...4 1 1 Main PCB Schematic Diagram 7 10 4 7 ...
Page 141: ...4 1 1 Main PCB Schematic Diagram 8 10 4 8 ...
Page 142: ...4 1 1 Main PCB Schematic Diagram 9 10 4 9 ...
Page 143: ...4 1 1 Main PCB Schematic Diagram 10 10 4 10 ...
Page 144: ...4 1 2 Main PCB Parts Location 4 11 ...
Page 145: ...4 2 MB PCB 4 2 1 MB PCB Schematic Diagram 4 17 ...
Page 146: ...4 18 4 2 2 MB PCB Parts Location ...
Page 148: ...4 3 Peripheral PCB 4 3 1 Peripheral PCB Schematic Diagram 4 20 ...
Page 149: ...4 21 4 3 2 Peripheral PCB Parts Location ...
Page 152: ...5 2 Main PCB 75 Peripherals ...
Page 153: ...5 3 Power Supply Peripherals ...
Page 154: ...5 4 Customer Display Peripherals ...
Page 155: ...5 5 LCD Peripherals ...
Page 156: ...5 6 Inverter PCB Peripherals ...
Page 161: ...Printed in Japan ...
