Panasonic JS-170FR Series, Service Manual

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2.1.12 ETHERNET interface circuit
As one of the communication methods for this system, the ETHERNET is used as the communication line.
The ETHERNET circuit is composed of the control block on the main PWB and the transceiver block.
The RTL8139B(L) is used as a control LSI.
In the serial EEPROM (BR93LC46) connected to the outside, interface-related information and various information about the I/O
addresses, interrupt, network’s ID addresses, etc., are stored. At the time of starting, the RTL8139(L) is set up based on this
EEPROM information.
The sync clock signal is generated from a 25MHz crystal oscillator connected.
During the reception of data, the serial data received from the transceiver are converted to parallel data, and various subsequent
processes take place, such as comparison with the ID address, 32-bit CRC code check, 64-bit preamble removal, and the
extraction of the data’s main part. Since then, the data are transferred to the receiver buffer.
During data transmission, the transmitting data are once stored in the transmitter buffer and conversion is conducted from
parallel data to serial data. Subsequently, the data are sent to the transceiver after the completion of the generation and addition
of a 64-bit preamble code and a 32-bit CRC code. In case of the occurrence of collision, re-transmission is carried out.
In this system, it is possible to perform wake-up operation of the power supply through the ETHERNET.
Under the condition that the primary-side power supply is switched ON, it is possible to accomplish automatic power ON by the
use of a command from another equipment.