2-45
2.1.15
Cash-Drawer interface circuit
As an integrated POS, two Cash-Drawer interface circuits are provided.
To drive the cash drawer, 328H of the I/O port is used for interface control.
Drawer 1 is controlled with Bit 4 of Address 328, while Drawer 2 is controlled with Bit 5.
When “1” is written in Bit 4, a high level output is generated at the DRW1-OPN signal (Pin 118) of the GATEARRAY
(
µ
PD65884GM). Then, Transistor Q25 is turned ON via Q24 and approx. +15V is supplied as the +DS1 signal.
When “1” is written in Bit 5, a high level output is similarly generated at the DRW2-OPN signal (Pin 117) of the GATEARRAY.
Then, Transistor Q26 is turned ON and approx. +15V is supplied as the +DS2 signal.
The drawer opening time can be selected by the use of Switches 3 and 4 of the DIPSW2.
The default setting is about 140msec.
Inside the GATEARRAY circuit, there is a circuit intended to avoid the simultaneous operation of Drawer 1 and Drawer 2.
CDSTATUS1 and CDSTATUS2 are the drawer status signals. For the type of a drawer to be connected, the logic may be
reversed.
In the present circuit, a low level is defined as the status when a drawer is closed. When using a drawer for which the logic has
been reversed, the section is short-circuited between Pin 5 and Pin 6 of the connector. (Arranged with a cable)
By making DRWCNT1 (Pin 119) and DRWCNT2 (Pin 114) of the GATEARRAY circuit turned to the high level, arrangements for
exclusive OR (EXOR) are made for the signals of DRWST1 (Pin 115) and DRWST2 (Pin 116) and also for the GATEARRAY
interior.
As a result, the software can conclude the judgment of Open or Close.
By reading out Address 32D of the I/O port, the logic can be defined at Bit 3 and 2.
FL
ERA15
22u
Q204
2SB1140
15K
820 (1/2W)
Q202
DTC123Y
L
1
2
3
4
1K
470
+5V
1u
FL
ERA15
22u
Q205
2SB1140
15K
820 (1/2W)
Q203
DTC123Y
L
1
2
3
4
1K
470
+5V
1u
330u
4.7K
(1/2W)
3.3 (2W)
DRV
D RW 1 - O P N
I N 3 2 0 - D 3
D RW C N T 1
D RW 2 - O P N
I N 3 2 0 - D 2
D RW C N T 2
118
115
117
116
GATEARY
+DS1
GND
CDSTATUS1
GND
+DS2
CDSTATUS2
GND
GND
5
6
5
DRAWER2
J S - 9 x x W S
6
10K
1K
+5V
10K
1K
+5V
118
114
Summary of Contents for JS-170FR Series
Page 2: ......
Page 10: ......
Page 30: ...1 20 ...
Page 80: ...2 50 ...
Page 101: ...3 17 LCD DISPLAY TEST 6 Video Test ENTER 1 OK or 2 NG ...
Page 134: ...4 JS 170FR PCB s 4 1 Main PCB 4 1 1 Main PCB Schematic Diagram 1 10 4 1 ...
Page 135: ...4 1 1 Main PCB Schematic Diagram 2 10 4 2 ...
Page 136: ...4 1 1 Main PCB Schematic Diagram 3 10 4 3 ...
Page 137: ...4 1 1 Main PCB Schematic Diagram 4 10 4 4 ...
Page 138: ...4 1 1 Main PCB Schematic Diagram 5 10 4 5 ...
Page 139: ...4 1 1 Main PCB Schematic Diagram 6 10 4 6 ...
Page 140: ...4 1 1 Main PCB Schematic Diagram 7 10 4 7 ...
Page 141: ...4 1 1 Main PCB Schematic Diagram 8 10 4 8 ...
Page 142: ...4 1 1 Main PCB Schematic Diagram 9 10 4 9 ...
Page 143: ...4 1 1 Main PCB Schematic Diagram 10 10 4 10 ...
Page 144: ...4 1 2 Main PCB Parts Location 4 11 ...
Page 145: ...4 2 MB PCB 4 2 1 MB PCB Schematic Diagram 4 17 ...
Page 146: ...4 18 4 2 2 MB PCB Parts Location ...
Page 148: ...4 3 Peripheral PCB 4 3 1 Peripheral PCB Schematic Diagram 4 20 ...
Page 149: ...4 21 4 3 2 Peripheral PCB Parts Location ...
Page 152: ...5 2 Main PCB 75 Peripherals ...
Page 153: ...5 3 Power Supply Peripherals ...
Page 154: ...5 4 Customer Display Peripherals ...
Page 155: ...5 5 LCD Peripherals ...
Page 156: ...5 6 Inverter PCB Peripherals ...
Page 161: ...Printed in Japan ...