2-16
2.1.5.1
IT8673F Pin Assignment
Pin No.
Signal name
IN/OUT
Functions
5
DENSEL#
OUT (*)
FDD packing density select signal. High
•
500K/1Mbps ,Low
•
250K/300Kbps
6
MTR0#
OUT(*)
Motor enable signal to the FDD Drive 0.
Active : Low
7
DRV1#
OUT(*)
Select signal to the FDD Drive 1.
Active : Low
8
DRV0#
OUT(*)
Select signal to the FDD Drive 0.
Active : Low
9
MTR1#
OUT(*)
Motor enable signal to the FDD Drive 1.
Active : Low
11
FDDIR
OUT(*)
The signal to specify the direction of the FDD head movement.
Low
→
Step in, High
→
Step out.
12
STEP#
OUT(*)
The signal to move the head during FDD seek.
Active : Low
13
WDATA#
OUT(*)
FDD write data signal.
Active : Low
14
WGATE#
OUT(*)
Write circuit enable signal for the drive that has seized the FDD.
Active : Low
15
HDSEL
OUT(*)
FDD head select signal. Low
→
Head 1, High
→
Head 0.
16
INDEX#
IN
The signal to indicate the first FDD track.
Active : Low
17
TRK0#
IN
Position signal for FDD Track 0.
Active : Low
18
WPRT#
IN
FDD write protect (write disable) signal.
Active : Low
19
RDATA#
IN
FDD read signal.
20
DSKCHG
IN
The signal used to indicate that the FDD drive door is open.
Active : High
21
|
32
91
92
A0
|
A11
A12
A13
IN
System address bus.
Address-latched signal.
33
IOCHRDY
OUT(*)
The signal that turns low when I/O address 210H is accessed.
34
SIRQ
IN/OUT
Serial interrupt signal.
36
PCICLK
IN
PCI clock for SIRQ sync.
37
IOR#
IN
Read signal to the I/O device.
Active : Low
38
IOW#
IN
Write signal to the I/O device.
Active : Low
39
|
42
44
|
47
D0
|
D3
D4
|
D7
IN/OUT
System data bus.
48
RXD1
IN
COM1 serial input data.
49
TXD1
OUT
COM1 serial output data.
50
DSR1#
IN
COM1 data set ready signal.
Active : Low
51
RTS1#/PIN95SEL
IN/OUT
COM1 send request signal.
Active : Low
Used at the high level with pin 95 for SA14 when the power supply is ON.
52
CTS1#
IN
COM1 send enable signal.
Active : Low
53
DTR1#/PIN96SEL
OUT
COM1 data terminal ready signal.
Active : Low
Used at the high level with pin 96 for SA15 when the power supply is ON.
54
RI1#
IN
COM1 ring indicator signal.
Active : Low
55
DCD1#
IN
COM1 data carrier detect signal.
Active : Low
56
RI2#
IN
COM2 ring indicator signal.
Active : Low
57
DCD2#
IN
COM2 data carrier detect signal.
Active : Low
58
RXD2
IN
COM2 serial input data.
59
TXD2
OUT
COM2 serial output data.
60
DSR2#
IN
COM2 data set ready signal.
Active : Low
61
RTS2#/KBC_IROM
OUT
COM2 send request signal.
Active : Low
Used at the high level with the KB controller’s built-in ROM when the power
supply is ON.
62
CTS2#
IN
COM2 send enable signal.
Active : Low
Used to enable the KB controller at the high level when the power supply is ON.
63
DTR2#/KBCEN
OUT
COM2 data terminal ready signal.
Active : Low
Summary of Contents for JS-170FR Series
Page 2: ......
Page 10: ......
Page 30: ...1 20 ...
Page 80: ...2 50 ...
Page 101: ...3 17 LCD DISPLAY TEST 6 Video Test ENTER 1 OK or 2 NG ...
Page 134: ...4 JS 170FR PCB s 4 1 Main PCB 4 1 1 Main PCB Schematic Diagram 1 10 4 1 ...
Page 135: ...4 1 1 Main PCB Schematic Diagram 2 10 4 2 ...
Page 136: ...4 1 1 Main PCB Schematic Diagram 3 10 4 3 ...
Page 137: ...4 1 1 Main PCB Schematic Diagram 4 10 4 4 ...
Page 138: ...4 1 1 Main PCB Schematic Diagram 5 10 4 5 ...
Page 139: ...4 1 1 Main PCB Schematic Diagram 6 10 4 6 ...
Page 140: ...4 1 1 Main PCB Schematic Diagram 7 10 4 7 ...
Page 141: ...4 1 1 Main PCB Schematic Diagram 8 10 4 8 ...
Page 142: ...4 1 1 Main PCB Schematic Diagram 9 10 4 9 ...
Page 143: ...4 1 1 Main PCB Schematic Diagram 10 10 4 10 ...
Page 144: ...4 1 2 Main PCB Parts Location 4 11 ...
Page 145: ...4 2 MB PCB 4 2 1 MB PCB Schematic Diagram 4 17 ...
Page 146: ...4 18 4 2 2 MB PCB Parts Location ...
Page 148: ...4 3 Peripheral PCB 4 3 1 Peripheral PCB Schematic Diagram 4 20 ...
Page 149: ...4 21 4 3 2 Peripheral PCB Parts Location ...
Page 152: ...5 2 Main PCB 75 Peripherals ...
Page 153: ...5 3 Power Supply Peripherals ...
Page 154: ...5 4 Customer Display Peripherals ...
Page 155: ...5 5 LCD Peripherals ...
Page 156: ...5 6 Inverter PCB Peripherals ...
Page 161: ...Printed in Japan ...