Panasonic FMU, Technical Manual

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FMU Technical Manual 5.3 FMU_DataExchange
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5.3.1.2 GlobalBusStateField for DeviceNet
Identifier part Identifier Explanation
Global bits GlobBit_Status Lower byte of the WORD. Details follow the table.
Status GlobBit_Status Higher byte of the WORD.
The master system can be in one of the following states:
• 16#00: OFFLINE
•
16#40: STOP
•
16#80: CLEAR
•
16#C0: OPERATE
Error remote address ErrRemAddr_ErrEvent Lower byte of the WORD.
If the global bits "control error, auto-clear error or
non-exchange error" are set, this variable indicates the
address of the device. If the error occurs in the FMU, the
value is 255. Otherwise the faulty device address = MAC
ID is stored.
Error event ErrRemAddr_ErrEvent Higher byte of the WORD.
Each error is assigned a number. The errors are
explained following the table.
Bus error count BusErrorCnt This variable is incremented whenever the error frame
counter of the Philips CAN chip used has reached the
warning limit due to disturbed bus communication.
Timeout count TimeOutCount This variable is incremented when the CAN chip reports
that it is no longer involved in bus activities because the
bus error frame counter has been exceeded. The chip
must be reinitialized, which is done automatically by the
FMU.
Server status MoreInformation Lower byte of ARRAY [0] of WORD.
The FMU is able to be a I/O server and master
simultaneously. The status of the server poll I/O
connection and the explicit connection can be read from
this variable.
• Bit 0 = current status of the server explicit connection.
• Bit 1 = current status of the server poll I/O connection.
•
Bits 2-7 are reserved.