3DQDVRQLF
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18.1.1.Video Signal Path
The composite video signal input via the RCA
terminal of AV3 is directly fed to connector M2 pin 6
and to the E-Board via connector E17. Here the
video signal is fed to the VDP
IC601
pin 64 where
the
signal
undergoes
further
processing
as
described in section 17.3.1.
Where a composite video signal is to be output via
AV2, the video signal is output from the VDP pin 59
of
IC601
and fed to the M-Board and transistor
Q3208
to the H-Board and the switching IC
IC3401
before being fed to the E-Board and AV2. During this
mode of operation the mix switch control is set LOW
switching
off
transistors
Q3205
and
Q3206
preventing interference from other processing paths.
An S-VHS signal input via AV3 on the other hand is
fed via the 4 pin connector as separate luminance
and chrominance signals.
Where an S-VHS signal has been selected as the
desired signal format, the luminance signal follows
the same processing path as the composite video
signal input just mentioned. This sees the luminance
signal being input via pin 64 of the VDP
IC601
.
The chrominance signal however is fed via transistor
Q2303
where the signal is buffered and fed to
switching transistor
Q2304
. This switching transistor
is controlled by the chroma switch control line which
is fed from the microprocessor
IC1101
pin 79 to the
M-Board via connector M1 pin 6 to the base of
transistor
Q2304
, this signal processing path being
selected when the control line is LOW.
The chrominance signal from AV3 is then fed via
buffer transistor
Q3205
and amplifier transistor
Q3206
under the control of the mix switch control
which is fed from the microprocessor
IC1101
pin 78.
When the mix switch control is
HIGH both
transistors
Q3205
and
Q3206
conduct. At the
collector of
Q3206
the chrominance signal follows
two paths.
:
The first path that the chrominance signal follows
is via
Q3207
where the signal is buffered and fed to
the VDP
IC601
pin 60 (Cin input) where the signal
undergoes further processing.
:
The second path feeds the chrominance signal
via transistor
Q3208
, here the chrominance signal is
added to the luminance signal which is fed from
pin 59 of the VDP
IC601
. This now complete video
signal which both chrominance and luminance
components are combined, is output from the
collector of transistor
Q3208
via connector M3 pin 8
via the H-Board and AV switching IC
IC3401
before
the signal is fed to the E-Board and output via AV2
scart terminal.
Likewise when the an S-VHS signal is input via AV2
the luminance component is fed directly to the VDP
IC601
and input via pin 63. The chrominance
component on the other hand is fed from AV2 to
connector E15 pin 4 and to the M-Board via
connector M3. This chrominance signal is then fed
to transistor
Q3201
whose conduction is controlled
by the chroma switch control. When this control line
is HIGH both transistors
Q3201
and
Q3202
conduct,
with this control line HIGH transistor
Q3204
is
switched
off,
preventing
interference
from
chrominance signals input via AV3.
The chrominance signal from AV2 is then fed via
transistor amplifier
Q3202
to the base of
Q3205
where the same processing path described earlier is
followed.
Summary of Contents for EURO 4 Chassis
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