CD4052B
CD4053B
Functional Block Diagrams
(Continued)
12
11
15
14
0
1
2
3
3
2
1
0
X CHANNELS IN/OUT
Y CHANNELS IN/OUT
BINARY
TO
1 OF 4
DECODER
WITH
INHIBIT
13
3
COMMON Y
OUT/IN
COMMON X
OUT/IN
7
8
16
6
9
10
A
†
B
†
INH
†
V
SS
V
EE
V
DD
TG
TG
TG
TG
TG
TG
TG
TG
4
2
5
1
LOGIC
LEVEL
CONVERSION
11
10
9
6
A
†
B
†
C
†
INH
†
12
3
5
1
2
13
TG
TG
TG
TG
TG
TG
4
COMMON
OUT/IN
ax
ay
bx
by
cx
cy
8
7
V
SS
V
EE
16 V
DD
IN/OUT
15
14
BINARY TO
1 OF 2
DECODERS
WITH
INHIBIT
LOGIC
LEVEL
CONVERSION
V
DD
†
All inputs are protected by standard CMOS protection network.
COMMON
OUT/IN
COMMON
OUT/IN
ax OR ay
bx OR by
cx OR cy
CD4051B, CD4052B, CD4053B
24
Summary of Contents for DT9904S
Page 1: ...SERVICE MANUAL DT9904S...
Page 4: ...3 7 9 2...
Page 12: ...7 MPEG BOARD CHECK WAVEFORM 7 1 27MHz WAVEFORM DIAGRAM 7 2 IC5L0380R PIN 2 WAVEFORM DIAGRAM 10...
Page 29: ...FRONT SCHEMATIC DIAGRAM 27...
Page 31: ...POWER BOARD SCHEMATIC DIAGRAM 29...
Page 33: ...OK SCHEMATIC DIAGRAM 31...
Page 35: ...OUTPUT BOARD SCHEMATIC DIAGRAM 33...
Page 40: ...MIAN SCHEMATIC DIAGRAM 38...
Page 47: ...11 APPENDIX AM FM Tuner Specificadtion 45...
Page 48: ...46...
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