44
Shared Memory Setting
Counter setting
Setting the operation mode for each counter CH.
In the example, the phase signal from encoder is input to R0.0 and
R0.1, and counter function is used in 1 multiplication phase input
mode, therefore, enter
「
FFFFFF20
」
to shared memory addresses 100h
and 101h.
Shared memory 100h, 101h settings
R0.13
R0.12
R0.9
R0.8
R0.5
R0.4
R0.1
R0.0
CH3
CH2
CH1
CH0
Input
mode
Functions
setting
Input
mode
Functions
setting
Input
mode
Functions
setting
Input
mode
Functions
setting
F
F
F
F
F
F
2
0
Unused
Unused
Unused
Unused
Unused
Unused
Phase
Input
Terminal
Input
External input
Setting item
(bit) 32
Counter
number
Set value
Settings
16 15
0
In phase differential input mode, the input pulse
magnification can be changed with multiplication function.
See
"High-speed Counter Function" in Chapter 1
for details.
IMPORTANT