NXP Semiconductors QorIQ T1040, User Manual, Page: 48 / 68

3.2.7 INTSR
Address: 0h base + 12h offset = 12h
Bit 0 1 2 3 4 5 6 7
Read THERM_INT SG_INT QSG1_INT QSG2_INT POTSA_INT POTSB_INT TDMR1_INT TDMR2_INT
Write
Reset n* n* n* n* n* n* n* n*
* Notes:
TDMR2_INT field: Depends on PLD image revision. •
TDMR1_INT field: Depends on PLD image revision. •
POTSB_INT field: Depends on PLD image revision. •
POTSA_INT field: Depends on PLD image revision. •
QSG2_INT field: Depends on PLD image revision. •
QSG1_INT field: Depends on PLD image revision. •
SG_INT field: Depends on PLD image revision. •
THERM_INT field: Depends on PLD image revision. •
INTSR field descriptions
Field Description
0
THERM_INT
0: No interrupt occurs.
1: Board over temperature interrupt occurs.
1
SG_INT
0: No interrupt occurs.
1: SGMII PHY(RTL8211DN) interrupt occurs
2
QSG1_INT
0: No interrupt pending
1: QSGMII PHY1(VSC8514) interrupt occurs.
3
QSG2_INT
0: No interrupt pending
1: QSGMII PHY2(VSC8514) interrupt occurs
4
POTSA_INT
0: No interrupt pending
1: POTS A interrupt occurs
5
POTSB_INT
0: No interrupt pending
1: POTS B interrupt occurs.
6
TDMR1_INT
0: No interrupt pending
1: TDM riser card interrupt 1 occurs.
7
TDMR2_INT
0: No interrupt pending
1: TDM riser card interrupt 2 occurs.
CPLD memory map
QorIQ T1040 Reference Design Board User Guide, Rev. 0, 06/2015
48 Freescale Semiconductor, Inc.