NXP Semiconductors QorIQ LS1028A, Reference Manual, Page: 46 / 112

CPLD
SW1
O
VD
D
=1
V8
3V3
IRQ_RTC_B
IRQ_QS GMII_B
uB US 1_INT
uB US 2_INT
IRQ_ETH_B
LS1028
CPLD
CFG_MEM_WP
CFG_XS PI_MAP [3:0]
MAX CP LDs do not
have a pulldown
option, so switches
are implemented as
shown. The CPLD
inverts the signals,
so that UP =ON.
CPLD
1
8
5
4
3
2
6
7
O
N
SW2
1
8
5
4
3
2
6
7
O
N
SW3
1
8
5
4
3
2
6
7
O
N
LED_STAT[7:0]
ASLEE P
TB SCAN_EN_B
TES T_SE L_B
ASLEE P (cfg_soc_use)
TES T_SE L_B
to FlexSPI
to I2C Memory
CFG_MUX_UART2_SE L0
CFG_MUX_uB US 1_UART_B
CFG_MUX_uB US 2_UART_B
CFG_MUX_uB US 1_SP I_B
CFG_MUX_uB US 2_SP I_B
CFG_MUX_uB US 1_PWM_B
CFG_MUX_uB US 2_PWM_B
to UART2 &
MikroClick modules
PRES ENT_SLOT[1:2]_B
PRES ENT_PROC_B
ROTATION_ERR_B
THERM_W ARN_B
THERM_ALERT_B
LED_FAIL
LED_PASS
LED_PORS T
LED_RSTREQ
LED_THERM
SW1[1:8]
SW2[1:8]
SW3[1:8]
I2C1_SDA
I2C1_SCL
CTS
218-8LP ST
CTS
218-8LP ST
CTS
218-8LP ST
CFG_XTE ST
LEDs of
indicated
colors
(RED =alert)
TestP oint
POR_cfg
GP IO
DIP Switch Controls:

SW_RCW_SRC[3:0]

SW_RST_MODE

sw_enguse[0]

SW_TE STSE L_B

SW_SVR[0:1]

SW_UART2MAP[1:0]

SW_UCLICK_PWMMAP

SW_UCLICK_SP IMAP

SW_CPU_FORCE[1:0]

SW_BYPASS_B

SW_CFG_WP

SW_BOOTBOX_B
CPLD_PROG_TDI
CPLD_PROG_TDO
CPLD_PROG_TCK
CPLD_PROG_TMS
8
6
9
7
5
3
4
2
1
10
3.3V
Samtec
HTST-105-01-SM-DV
GP IO1_25 for INT
POR_cfg (LS1028 & LS1043INT
LED_ASLEE P
Figure 23. System controller architecture (continued)
The system controller is implemented in a 100-ball FBGA Altera CPLD, EPM2210F256C5N.
The system controller is powered using the 3.3 V and 1.8 V regulators. The CPLD controls the reset of the board peripherals
including the LS10128A processor. However, the CPLD does not control power sequencing.
2.21.1 System configuration
The system controller uses switches to configure the target system into various modes. Switches are sampled and stored in
BRDCFG and DUTCFG registers. BRDCFG registers are always active, and software may change them to result in immediate
changes to the system configuration. DUTCFG registers are used to control processor configuration pins that are only sampled
LS1028ARDB Functional Description
QorIQ LS1028A Reference Design Board Reference Manual, Rev. b, 11/2018
46
COMPANY CONFIDENTIAL NXP Semiconductors