The LS1012A I2C1 interface operates at 1.8 V OVDD power supply.
Table 2-9
summarizes the I2C bus device addresses.
NOTE
7-bit addresses do not include the R/W bit as an address
member, though some datasheets might do so. For consistency,
all I2C addresses are 7 bits of addresses only.
Table 2-9. I2C bus device map
I2C bus
I2C address
Device
Notes
I2C1
0x0a
SAI audio codec
• SAI 2 port with full duplex support
n/a
Arduino Shield
• Provides support for Ardiuno and
Freedom shield expansion
0X08
MC34VR5100A1EP
• Power supply for:
• LS1012A power supplies
• DDR3L memory
• 1.8 V voltage for QSPI memory,
SAI2 port, general I/O
2.11 QSPI interface
The FRDM-LS1012A supports QSPI as the primary system boot source. The FRDM-
LS1012A supports onboard Spansion S25FS512SAGNFI011 quad-SPI serial flash
memory with 64 MB space.
LS1012A supports only one QSPI controller with 1 chip select, PROC_QSPI_CS_B. The
board doesn't support the quad mode, only single and dual bit modes are supported.
2.12 SPI interface
The FRDM-LS1012A SPI features are as follows:
• SPI bus interface is connected to a high performance UART bridge, SC16IS740IPW.
The UART interface connects to devices on Arduino/Freedom expansion connectors.
• SPI bus interface can also connect to the Ardiuno shield, J2, via level translators.
The following table describes the SPI devices used on the FRDM-LS1012A board.
Chapter 2 LS1012AFRDM Functional Description
QorIQ FRDM-LS1012A Board Reference Manual, Rev. 3, 12/2016
NXP Semiconductors
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