NXP Semiconductors
Quick Start ADC1002S020
QS ADC1002S020
QS_ADC1002S020_2
© NXP B.V. 2010. All rights reserved.
Quick Start
Rev. 2 — 11 octobre 2010
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Fig 6. HSDC extension module: HE14 CMOS hardware schematic overview
The HSDC extension module can acquire data in CMOS level using:
•
either the on-board clock generated by the internal PLL, refer to as
pDFS_CLK[0]/nDFS_CLK[0] that will be used by the FPGA. In this case, the
reference of the board should be delivered by the clock signal generator;
