N
X
P
S
e
m
ic
o
n
d
u
c
to
rs
Q
S
A
D
C
1
0
0
2
S
0
2
0
Q
u
ic
k
S
ta
rt
A
D
C
1
0
0
2
S
0
2
0
Q
u
ic
k
S
ta
rt
Q
S
_
A
D
C
1
0
0
2
S
0
2
0
_
2
R
e
v
. 2
—
1
1
o
c
to
b
re
2
0
1
0
3
o
f 2
4
1. Overview of the ADC1002S020 demo board
1.1 ADC1002S020 demoboard
Figure 1
presents the connections to measure the ADC1002S020 based on DEMO8766G:
Fig 1. ADC1002S020 demoboard set-up
P
OWER SUPPLY
. I = 50 mA
. 12 V
.GND
LOGIC
ANALYZER
Output data:
. D9 (MSB) to D0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT SIGNAL
. 2 V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single TTL-CMOS clock signal
. 3.3 V power supply
. ADC active
. Binary ADC output
. VRB = 1.2 V
DC
. VI+OFS = VRM (= 2.25 V
DC
)
. VRT = 3.3 V
DC
Synchronized
