NXP Semiconductors
Quick Start ADC1002S020
QS ADC1002S020
QS_ADC1002S020_2
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Quick Start
Rev. 2 — 11 octobre 2010
12 of 24
3.2 HSDC extension module: FPGA flash
To get access to the software control of the generation system, run the “USB
Configurator.exe”. It is located by default in the directory "C:\Program Files\Electronique
Concept\USB Configurator\".
If a HSDC extension module is connected to the user system it will display the following
window:
Fig 8. “USB Configurator” window: board main control
This window gives an overview of the current status of the board connected. If supply is
not connected, a FAIL status appears on the Power status field.
Flash the FPGA with the appropriate bin file provided on the CD located at “\HSDC-
EXTMOD01\Software\USBConfigSetup v1.3 100212 1525\HSDCEXTMOD FPGA bin
v03”. Among the 8 files, 2 are considered here:
•
“HSDCEXTMOD_v03_P1C_RE_3V3_GEN.bin”: the FPGA will use the rising edge
of the clock delivered by connector P1C;
•
“HSDCEXTMOD _v03_P1C_FE_3V3_ACQ.bin”: the FPGA will use the falling edge
of the clock delivered by connector P1C.
For further details regarding the others file please contact
dataconverter-
.
Browse to select the wanted bin file. Click “Erase” and “Program” buttons. Once the
“Successful” message appears, click “Reset FPGA” button: board is programmed.
3.3 HSDC extension module: DATA clock configuration
To acquire the digital input pattern on P1 connector, the user needs to choose the
wanted frequency. In our example, the frequency used for acquisition is 20 MHz and the
reference signal is provided on external “REF” pin:
