Installing ISDN BRI hardware
Page 47 of 120
Installation and Configuration
Figure 11
Clock reference cable connection
Clock recovery
The SILC is configured in the slave-slave mode when acting as a trunk
interface. This is configured through the Maintenance Signaling Channel
(MSC). The microcontroller configures the S/T chips on the SILC as
appropriate.
The SILC can recover the network clock from the received data stream using
on-chip phase lock loops. The clock frequency that is recovered is 2.56 MHz.
The jitter and wander conform to CCITT recommendations.
All of the S/T chips on the SILC could be configured as Terminal Equipment
Slaves (TES), but only the clocks recovered from DSL0 and DSL1 are routed
CE I/O panel
C
C
S
I
L
C
IPE I/O panel
NTND70AA
NTND71AA - AD
NTND72AA
IPE shelf
CE shelf
553-7702
Summary of Contents for Communication Server 1000M
Page 2: ......
Page 4: ...Page 4 of 120 Revision history 553 3001 218 Standard 2 00 September 2004...
Page 12: ...Page 12 of 120 About this document 553 3001 218 Standard 2 00 September 2004...
Page 16: ...Page 16 of 120 Preparing for installation 553 3001 218 Standard 2 00 September 2004...
Page 52: ...Page 52 of 120 Installing ISDN BRI hardware 553 3001 218 Standard 2 00 September 2004...
Page 90: ...Page 90 of 120 Configuring ISDN BRI hardware 553 3001 218 Standard 2 00 September 2004...
Page 98: ...Page 98 of 120 Preparing the system 553 3001 218 Standard 2 00 September 2004...
Page 120: ...Page 120 of 120 Generating traffic reports 553 3001 218 Standard 2 00 September 2004...
Page 121: ......