Hardware Functional Overview 4-7
AGP-data/transaction flow optimized arbitration mechanism
AGP side-band interface for efficient request pipelining without
interfering with the data streams
AGP-specific data buffering
Supports concurrent CPU, AGP and PCI transactions to main
memory
AGP high-priority transactions support
n
Power Management Functions
Stop Clock Grant and Halt special cycle translation (host to PCI
Bus)
Mobile and Deep Green Desktop support for system suspend/resume
(i.e. DRAM and power-on suspend)
Dynamic power down of idle DRAM rows
SDRAM self-refresh power down support in suspend mode
Independent, internal dynamic clock gating reduces average power
dissipation
Static STOP CLOCK support
Power-on Suspend mode
Suspend to DRAM
ACPI compliant power management
n
Packaging/Voltage
492 Pin BGA
3.3V core and mixed 3.3V and GTL I/O
n
Supporting I/O Bridge
System Management Bus (SMB) with support for DIMM Serial
Presence Detect
PCI-ISA Bridge (PIIX4E)
Power Management Support
3.3V core and mixed 5V, 3.3V I/O and interface to the 2.5V CPU
signals via open-drain output buffers
