NEC PlasmaSync PX-42M2A, Service Manual

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6-1
CIRCUIT DESCRIPTION
I. Description of Analog PWB Circuit Operation
1. Video signal processing
(1) HD decoder and PC interface blocks
The component signal input (YPbPr, YCrCb) from the “HD” connector and the PC signal input from the “PC”
connector are applied to the ANALOG PWB, and further to IC6110. In IC6110, the component signal is con-
verted into RGB type and output is generated through PC-signal changeover. Changeover is effected with the
control signal PCOTHER from the microcomputer IC6800 used for system control. Demodulation of HI-VI-
SION signals and DVD and such component type video signals is also controlled by the NTHD signal from the
microcomputer.
(2) Video AMP block
The RGB type video signal input from the “VD” connector and the RGB signal output from IC6110 are entered
in IC6109. These signals are changed over by the RGBSEL signal from the microcomputer, and entered in
IC6113. The video and HI-VISION signals are input in IC6113 after passing through IC6111 (buffer AMP),
FL6103 ~ FL6105 (band limit filters), and IC6112 (changeover switch). In IC6113, the input signals are ad-
justed to a voltage suitable for the AD converter at the next stage. IC6113 involves a clamp circuit, and DC
values are determined at the brightness control and sub-brightness control terminals. The video amplitude is
determined by the contrast control and sub-contrast control terminals. Each control terminal is controlled by
the microcomputer. The brightness control terminal is adjustable with “BRT” in factory adjusting mode and
“brightness” of the user menu. The contrast control terminal is adjustable with “CONT” in factory adjusting
mode and “VIDEO” of the user menu. The sub-brightness control and sub-contrast control terminals are re-
spectively adjustable with “RB, GB, BB” and “RD, GD, BD” in factory adjusting mode. Adjusted values are
approximately 540mVdc for the black part of the video signal, and 2.24Vdc for the white part. Clamp pulses are
fed from IC6506 (timing controller).
(3) AD converter block
The AD converter block (IC6114, IC6115, IC6116) is intended to convert the analog RGB signal into the 8-bit
digital signal. Sampling is effected with the ADCLK signal that is fed from IC6506. The clock frequency can
differ according to the display signals (HI-VISION, VIDEO, etc.) and the PC mode.
(4) Digital signal processor block
The digitized video signals are converted into signals suitable for plasma display by double speed conversion
and picture element conversion at the field memory (IC6500, IC6502, IC6504, IC6512, IC6513, IC6514), the
signal processing IC (IC6551), and the latch ICs (IC6501, IC6503, IC6505, IC6515, IC6516, IC6517, IC6600,
IC6602, IC6604). This IC group is controlled by the signal processing control IC (IC6552). IC6552 is controlled
by the various signals of HDPTC, VDPTC, SVPWCK, SVPRCK from the IC6506 block (timing controller),
PTCCLK and PTCDATA from the microcomputer, DSCLK and DSDATA from the ROM (IC6607, IC6608, IC6610,
IC6611, IC6617, IC6618), and XRST, etc. from the on-screen synthetic IC (IC6606).
IC6551 has an independent clock for system operation. X6550 is a quartz crystal oscillator for clock signal
generation.
Correction is performed at the gamma correction processing ICs (IC6601, IC6613, IC6603, IC6614, IC6605,
IC6615) so that the g value can be almost identical with the CRT value. SW6602 is a switch used to select a
value of inverse g correction. It is usually set at “0.” JP6600 is a switch used to select the accuracy of g
correction processing. It is usually connected to the “3 (microcomputer control)” side.
(5) On-screen synthesis processor block
The gamma-processed digital video signal and the on-screen signal are synthesized at IC6606, and the result-
ant output is sent to the plasma display module (“AD” connector). IC6606 is in charge of signal synthesis under
the control by HSYNC, VSYNC, DEFCK, ROMOCK from the IC6506 block. Using the BLKH timing from the
IC6506 block, IC6606 performs vertical blanking (black synthesis).
2.24Vdc
540mVdc