NEC PlasmaSync 50MP1, User Manual

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(12) Definition conversion processing block (IC8502)
Using the SDRAM (consisting of IC8503 and IC8504), IC8502 performs the conversion of the XGA signal to
a level equivalent to VGA, the modification of the screen size for normal, full, etc., zoom operation, and the
movement of the screen position. This IC8502 also performs color temperature regulation according to the
user menu.
For memory control, a clock signal of 100MHz is produced at X8501. This signal is supplied to IC8502 and
each SDRAM.
The clock signals and the horizontal and vertical sync signals to be entered in IC8502 are classified into two
categories. One is the signal (input side) synchronized with the input signal and the other is the signal
(output side) synchronized with the signal to be supplied to the plasma display module. Like the video
signals, the clock and sync signals are fed from IC7501 and IC9000, respectively.
(13) ON-screen signal generator block
IC9401 is generating ON-screen signals. The contents of display are controlled by the SBD, SBK, and
CSOSD signals sent from the microcomputer IC9501. The SBD, SBK, and CSOSD signals are put into the
conversion of 5V
→
3V through IC9405 and the input is entered in IC9401. The clock, horizontal sync, and
vertical sync signals are sent from the IC9000 block.
(14) Gate array block (Post G/A IC9000)
For video signal processing, IC9000 is provided mainly with the four functions specified below. These
functions are controlled by bus SIK2, SID2, and CSYUMA from the microcomputer IC9501 and by the
signals of signal reset and video mute.
1
The video signal output from IC8003 is sent to IC8502. The video signal from IC8502 is output to
IC8003. This output is ON/OFF controlled by the microcomputer.
2
The video signal from IC8003/IC8502 is selected. In the case of dual screen processing, synthesis
processing is carried out and the output is sent to IC9403 and IC9404.
3
γ
processing is conducted for video signals. The
γ
curve is set up by the microcomputer.
4
IC9401 (ON-screen IC) is controlled. The synthesis of ON-screen signals into video signals is carried
out.
(15) Plasma display module output block
In IC9003 and IC9004, the 48-bit parallel video signal output from IC9000 is processed for conversion into
the LVDS serial signal. The resultant output is sent to the plasma display module (“AD” connector).
2. Sync signal processor block
(1) AD converter block (IC6501, IC6701)
In the AD converter of IC6501 and IC6701, a sampling clock signal (clock on input side) is generated on the
basis of the horizontal sync input (Pin 111) from the YU connector and the PC connector (Pin 10). Based on
this clock signal at Pin 98 (Pin 99 for IC6701), a clock signal output at half the frequency is generated from
Pin 101. The phase comparison output (pulses synchronized with the input horizontal sync signal) is gener-
ated from Pin 103 and fed to the latter stages. The oscillation frequency for clock signals differs according
to the input signal. Phase comparison is effected when the potential at Pin 106 is at the “L” level. This phase
comparison pin is controlled by the phase comparison stop signal output from IC7501.
(2) Panel link block (IC7002)
During the entry of RGB3 input, the signals of clock, horizontal and vertical sync, and video period discrimi-
nation are output.
All these signals are entered in IC7501. Under the control from IC7501, clock signals are fed to other ICs.