4
µ
PD754202, 754202(A)
CONTENTS
1.
PIN CONFIGURATION (Top View) .................................................................................................... 6
2.
BLOCK DIAGRAM ............................................................................................................................... 7
3.
PIN FUNCTION .................................................................................................................................... 8
3.1
Port Pins ...................................................................................................................................... 8
3.2
Non-port Pins .............................................................................................................................. 9
3.3
Pin Input/Output Circuits ......................................................................................................... 10
3.4
Recommended Connection of Unused Pins .......................................................................... 11
4.
SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE ....................................... 12
4.1
Differences between Mk I Mode and Mk II Mode .................................................................... 12
4.2
Setting Method of Stack Bank Select Register (SBS) ........................................................... 13
5.
MEMORY CONFIGURATION ............................................................................................................ 14
6.
PERIPHERAL HARDWARE FUNCTION ......................................................................................... 17
6.1
Digital I/O Port ........................................................................................................................... 17
6.2
Clock Generator ........................................................................................................................ 17
6.3
Basic Interval Timer/Watchdog Timer ..................................................................................... 19
6.4
Timer Counter ........................................................................................................................... 20
6.5
Bit Sequential Buffer ................................................................................................................ 24
7. INTERRUPT FUNCTION AND TEST FUNCTION ........................................................................... 25
8.
STANDBY FUNCTION ....................................................................................................................... 27
9.
RESET FUNCTION ............................................................................................................................ 28
9.1
Configuration and Operation Status of Reset Function ........................................................ 28
9.2
Watchdog Flag (WDF), Key Return Flag (KRF) ...................................................................... 32
10. MASK OPTION .................................................................................................................................. 34
11. INSTRUCTION SETS ......................................................................................................................... 35
12. ELECTRICAL SPECIFICATIONS ...................................................................................................... 44
13. CHARACTERISTIC CURVES (REFERENCE VALUES) ................................................................ 53
14. PACKAGE DRAWINGS ...................................................................................................................... 55
15. RECOMMENDED SOLDERING CONDITIONS .................................................................................. 57
Summary of Contents for Mu754202
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