Vector-LP Radio Beacon Transmitter Technical Instruction Manual
Page 6-9 (6-10 Blank)
Section 6 Theory of Operation
Issue 1.1
The
B+ Sample
input at P1-3 is a dc voltage
directly proportional to the B+ voltage being
applied to the transmitter's RF power stage.
When the B+ voltage is 236 V (for VR250) or
167 V (for VR125), the
B+ Sample
input and,
in turn, the output of buffer U3D (TP4), are a
nominal 4.0 V (for VR250) or 2.8 V (for
VR125). This voltage is applied to U7-X1.
The gain of U6 and U7 and, in turn, the
voltage at U7-Y1 is determined by the
following formula:
Unbalanced Audio * Carrier Ref / B+ Ref
When the
Carrier Ref
input (U6-Y1) is 4.7 V
and the
B+ Sample
input (U7-X1) is 4.0 V (for
VR250) or 2.8 V (for VR125), the gain of U6
is 1.18 (for VR250) or 1.68 (for VR125) for the
dc reference applied to U6-X1. The U7-Y1
current is 1.18 (for VR250) or 1.68 (for
VR125) times the U6-X1 current. U3B is
connected as a less than unity amplifier and
its gain is summed with U7's gain. The end
result is the total voltage gain of the circuit,
relative to the voltage at the output of U2D
(1.4 V), is a nominal 1.11 (for VR250) or 1.58
(for VR125) when
GAIN TRIM
potentiometer
R31 is set to the centre of its range. The
output of U3B (TP8) is 1.55 (for VR250; 1.4 V
x 1.11) or 2.21 (for VR125; 1.4 V x 1.58).
The gain of U7 will change in direct proportion
to changes in the
Carrier Ref
voltage. If the
Carrier Ref
voltage is set to 0 V, or it is
clamped to ground because Q1 is turned on,
U7's gain is minimum (zero). In turn, the dc
reference's multiplication factor is minimum
(zero). The transmitter's RF output is turned
off.
The gain of U7 will change in inverse
proportion to changes in the
B+ Sample
input.
This feature eliminates the need for
sophisticated filtering of the transmitter's B+
power supply and maintains the transmitter's
RF output at the original level for B+ voltage
variations of ±10%.
GAIN TRIM
potentiometer R31 provides a
nominal 10% adjustment in the
carrier level
ref
output of U3B. In dual exciter applications,
it is adjusted to compensate for tolerance
differences in the PDM generators of exciters
A and B. When it is set properly, the
transmitter's RF output is the same when
either exciter is selected, provided the same
Carrier Ref
is being applied.
6.4.3.2 PDM DIVIDER
The PDM divider circuit divides the 2
g
PDM
input frequency (P1-7) by two. The resulting
g
PDM
output (P1-10) is a 0 V to 15 V square
wave. Unless otherwise established during
the transmitter's manufacture, it should be a
fixed frequency, nominally 130 kHz.
6.4.3.3 LINEAR INTEGRATOR
The linear integrator circuit converts the
g
PDM
square wave input to a triangular waveform.
The triangular waveform has negative and
positive voltage excursions of equal
amplitude and duration. The long R/C time
constant formed by C26/R10 ensures a linear
rise and fall time. Since the R/C time constant
is fixed, the waveform amplitude varies over
the frequency range of
g
PDM
. The charge/
discharge time and waveform amplitude are
maximum at the lowest frequency.
6.4.3.4 INTEGRATOR PEAK DETECTOR
The integrator peak detector circuit detects
the positive going parts of the linear
integrator's triangular waveform. A portion of
the resulting positive dc voltage (nominally
1.8 V) at U2C’s output, is applied to the
inverting input of differential amplifier U3A.
The
carrier level ref
output of U3A is offset by
this voltage, which is proportional to the
triangular waveform voltage peaks. This
offset effectively sets the
carrier level ref’s
zero power reference to the triangular
waveform's peak voltage. This ensures no RF
output is produced when the
Carrier Ref
input
(P1-2) is 0 V.
