Chapter 5
Analog Output
5-8
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AO Sample Clock Signal
Use the AO Sample Clock (ao/SampleClock) signal to initiate AO samples.
Each sample
u
pdates the o
u
tp
u
ts of all of the DACs. Yo
u
can specify an
internal or external so
u
rce for AO Sample Clock. Yo
u
also can specify
whether the DAC
u
pdate begins on the rising edge or falling edge of
AO Sample Clock.
Using an Internal Source
One of the following internal signals can drive AO Sample Clock:
•
AO Sample Clock Timebase (divided down)
•
Co
u
nter
n
Internal O
u
tp
u
t
A programmable internal co
u
nter divides down the AO Sample Clock
Timebase signal.
Using an External Source
Use any inp
u
t PFI line as the so
u
rce of AO Sample Clock.
Routing AO Sample Clock to an Output Terminal
Yo
u
can ro
u
te AO Sample Clock (as an active low signal) o
u
t to any o
u
tp
u
t
PFI terminal.
Other Timing Requirements
A co
u
nter on yo
u
r device internally generates AO Sample Clock
u
nless yo
u
select an external so
u
rce. AO Start Trigger starts the co
u
nter and either the
software or hardware can stop it once a finite generation completes. When
u
sing an internally generated AO Sample Clock, yo
u
also can specify a
config
u
rable delay from AO Start Trigger to the first AO Sample Clock
p
u
lse. By defa
u
lt, this delay is two ticks of AO Sample Clock Timebase.