© National Instruments
|
8-23
NI High-Speed Serial Instruments User Manual
Note
The number of array elements fed into the DMA FIFO from the Host can limit
the maximum throughput for your application. Use large array subsets and set your
FIFO depths to be deep enough to sustain high throughput.
Peer-to-Peer Streaming
The peer-to-peer data streaming architecture is a method of transferring data between hardware
devices. A peer-to-peer stream acts like a single, unidirectional pipe from which data can flow
directly from one device to another. Using the peer-to-peer data streaming architecture, two or
more devices can transfer data directly to each other without first going through the host
processor.
The high-speed serial devices can stream Peer-to-Peer (P2P) data to or from any other NI-P2P
capable device. For example, you can implement the writer on a digitizer using the NI-SCOPE
instrument driver and implement the reader on an NI high-speed serial software-designed
instrument device using LabVIEW with the LabVIEW FPGA Module.
For an overview of the P2P architecture, refer to
An Introduction to Peer-to-Peer Streaming
at
ni.com
. If you need more details on Peer-to-Peer and the P2P API, refer to the
NI Peer-to-Peer
Streaming Help
, available at
ni.com/manuals
and as part of the
NI High-Speed Serial
Instruments Help
.
Maximizing Peer-to-Peer Streaming Throughput
Maximum throughput is dependent on the streaming modules, chassis, and, if the configuration
warrants it, the controller. Generally, the lowest of these rates is the maximum possible P2P
bandwidth. High-speed serial devices are PXI Express x8 Gen 2 capable, meaning they allow
theoretical 3.4 GB/s unidirectional streaming and theoretical 2.4 GB/s bidirectional streaming.
The recommended hardware setup for getting maximum P2P streaming between NI high-speed
serial instruments is to use an NI PXIe-1085 chassis with a device in slot 4 and a device in slot 6.
For example, a P2P steam that is four U64 samples wide running on the 100 MHz PXI clock can
theoretically transfer data at 3.2 GB/s. When transferring data at this speed, use the handshaking
interface on the P2P FIFO to implement flow control.
PXI Triggers
You can use the FPGA I/O Node to access the trigger lines on PXI devices. The following
sections explain how to configure trigger pulses, reserve trigger lines, and release trigger lines.
Configuring Trigger Pulses
To ensure compatibility with other devices, configure trigger pulses on the high-speed serial
device to last for at least two clock cycles of the clock on the receiving device. For example,
if the clock on the receiving device is 80 MHz, which corresponds to a clock period of
12.5 nanoseconds, the trigger line must be constant for at least 25 ns, which is two cycles
of an 80 MHz clock.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
