Local bus signals may range from high-speed TTL signals to analog signals as high as 42 V.
Initialization software uses the configuration information specific to each adjacent peripheral
module to evaluate local bus compatibility.
PXI Trigger Bus
All slots on the same PXI bus segment share eight PXI trigger lines. You can use these trigger
lines in a variety of ways. For example, you can use triggers to synchronize the operation of
several different PXI peripheral modules. In other applications, one module located in the
system timing slot can control carefully timed sequences of operations performed on other
modules in the system. Modules can pass triggers to one another on the lines, allowing
precisely timed responses to asynchronous external events the system is monitoring or
controlling.
The PXI trigger lines from adjacent PXI trigger bus segments can be routed in either direction
across the PXI trigger bridges through buffers. This allows you to send trigger signals to, and
receive trigger signals from, every slot in the chassis. Static trigger routing (user-specified line
and directional assignments) can be configured through Measurement & Automation Explorer
(MAX). Dynamic routing of triggers (automatic line assignments) is supported through certain
National Instruments drivers like NI-DAQmx.
Note
Although any trigger line may be routed in either direction, it cannot be
routed in more than one direction at a time.
Figure 5. PXI Trigger Bus Connectivity Diagram
Timing and
Synchronization
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System Reference Clock
The PXIe-1092 chassis supplies PXI_CLK10, PXIe_CLK100 and PXIe_SYNC100 to every
peripheral slot with an independent driver for each signal.
An independent buffer (having a source impedance matched to the backplane and a skew of
less than 250 ps between slots) drives PXI_CLK10 to each peripheral slot. You can use this
PXIe-1092 User Guide
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