MiTAC MiNote 7321, Service Manual

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7321 N/B Maintenance 7321 N/B Maintenance
5.4 PC Card Interface controller
M ultifunction and M iscellaneous Pins
TERM INAL
NO.
NAM E
PDV GHK
I/O DESCRIPTION
M FUNC0 154 F15 I/O M ultifunction terminal 0. M FUNC0 can be configured as
parallel PCI interrupt INTA, GPI0, GPO0, socket activity
LED output, ZV switching outputs, CardBus audio PW M ,
GPE, or a parallel IRQ.
M FUNC1 155 E17 I/O M ultifunction terminal 1. M FUNC1 can be configured as
parallel PCI interrupt INTB, GPI1, GPO1, socket activity
LED output, ZV switching outputs, CardBus audio PW M ,
GPE, or a parallel IRQ.
Serial data (SDA). W hen LATCH is detected low after a PCI
reset, the M FUNC1 terminal provides the SDA signaling for
the serial bus interface. The two-pin serial interface loads the
subsystem identification and other register defaults from an
EEPROM after a PCI reset.
M FUNC2 157 A16 I/O M ultifunction terminal 2. M FUNC2 can be configured as
PC/PCI DM A request, GPI2, GPO2, socket activity LED
output, ZV switching outputs, CardBus audio PW M , GPE,
RI_OUT, or a parallel IRQ.
M FUNC3 158 C15 I/O M ultifunction terminal 3. M FUNC3 can be configured as a
parallel IRQ or the serialized interrupt signal IRQSER.
M FUNC4 159 E14 I/O M ultifunction terminal 4. M FUNC4 can be configured as PCI
LOCK, GPI3, GPO3, socket activity LED output, ZV
switching outputs, CardBus audio PW M , GPE, RI_OUT, or a
parallel IRQ. See Section 4.30, M ultifunction Routing
Register, for configuration details.
Serial clock (SCL). W hen LATCH is detected low after a PCI
reset, the M FUNC4 terminal provides the SCL signaling for
the serial bus interface. The two-pin serial interface loads the
subsystem identification and other register defaults from an
EEPROM after a PCI reset.
M FUNC5 160 F13 I/O M ultifunction terminal 5. M FUNC5 can be configured as
PC/PCI DM A grant, GPI4, GPO4, socket activity LED output,
ZV switching outputs, CardBus audio PW M , GPE, or a
parallel IRQ.
M FUNC6 161 B15 I/O M ultifunction terminal 6. M FUNC6 can be configured as a
PCI CLKRUN or a parallel IRQ.
RI_OUT/PM E 163 C14 O Ring indicate out and power management event output.
Terminal provides an output for ring-indicate or PM E signals.
SPKROUT 149 G15 O Speaker output. SPKROUT is the output to the host system
that can carry SPKR or CAUDIO through the PCI1420 from
the PC Card interface. SPKROUT is driven as the
exclusive-OR combination of card SPKR//CAUDIO inputs.
SUSPEND 156 D19 I Suspend. SUSPEND protects the internal registers from
clearing when the GRST or PRST signal is asserted.
16-Bit PC Card Address and Data (Slots A and B)
TERM INAL
NO.
SLOT A† SLOT B‡
NAM E
PDV GHK PDV GHK
I/O DESCRIPTION
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
121
118
116
114
111
109
107
105
103
112
115
108
106
117
100
95
102
104
119
123
125
126
128
131
132
133
M 18
N19
N17
P19
P17
R18
P15
T19
U15
P18
M 14
N14
R17
N18
P14
W 14
R14
W 16
M 15
L19
L17
L15
K19
K15
K14
J19
55
53
51
49
47
45
42
40
37
48
50
43
41
52
34
29
36
39
54
57
59
60
62
65
66
67 R6
W 4
R3
R2
R1
N5
N6
N2
M 6
P6
P5
P1
N3
T1
M 1
L1
M 3
N1
U5
V5
U6
V6
W 6
V7
W 7
R8
O
PC Card address. 16-bit PC Card address lines. A25 is
the most significant bit.
5. Pin Descriptions of Major Components