10
7321 N/B Maintenance
7321 N/B Maintenance
1.2.3 Core Logic_ VT8231
1.2.3.1 VT8362
Defines Integrated Solutions for Value PC Mobile Designs
--
High performance SMA North Bridge : Integrated VIA Apollo KT133 and S3®
--
64-bit Advanced Memory controller supporting PC100/PC133 SDRAM and VRM
--
Combines with VIA VT82C686A/B PCI-ISA South Bridge for state-of-the-art power
management2
Savage4™ in a
High Performance CPU Interface
--
Socket-A and Slot A support for AMD® Athlon™ processors (pinout optimized for Socket-A)
--200
or 266 MHz CPU Front Side Bus (FSB)
--Built
-in Phase Lock Loop circuitry for optimal skew control within and between clocking
regions
--Five
outstanding transactions(four In-Order Queue(IOQ)plus one output latch)
--Dynamic
deferred transaction support
single chip
Advanced High-Performance DRAM Controller
--
DRAM interface runs synchronous(66/266,100/200,133/266)mode or pseudo- synchronous
(66/200,100/266,133/200)mode with FSB
--Concurrent
CPU,internal AGP,and PCI access
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