M2D-Laser-Scanner with Ethernet-Interface
Manual
HB-M2D-Ethernet-E
Page 8 of 39
www.MElsensor.com
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The camera creates approximately 103 profiles per second. This
corresponds to 9.71 msec period. The maximum shutter time is
shorter than 9.71 msec, because of the minimum erase time
interval.
Maximum shutter time = 9.71 msec * 256 / 286 = 8.69 msec
This maximum shutter time value is divided in 16384 steps.
The sensitivity is not linear. Therefore the “regulation value”
(RegisterValue – see Register 0 …3) is linearised using 8
definite set values.
For the calculation of the shutter time using the regulation value ( Regelwert) (0 = longest 1022 = shortest shutter
time) the following approximation formula applies:
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The current camera model sends with 5 Byte data format selected and with protocol version 2 and 3 the number
of 291 pixels per profile. (protocol version 1 and 4 Byte is 283 pixels!). After the profile information with firmware
revision 1.9.11 4 Bytes of encoder data follow at the end of the data block. Up to firmware revision 1.9.10, the
encoder data has been transferred at the beginning of the block. See page 5 for details.
Register 12 sets the version of protocol ( 1 … 3).
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This register controls the algorithm responsible fort he profile detection in the FPGA. A change in setting should
be made only, when the result could be verified immediately. When no improvement is achieved, you should
immediately set back default value = 10. The effect of increasing Peak detection threshold may result in more or
less stray pixels on surfaces with noise optical response (creating speckles). Increasing Peak threshold
could
remove those effects, depending on the situation on the camera. We recommend to use the option “read
complete image” to evaluate what the camera is picking up, before changing Peak threshold.
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”
Status LED’s
Meaning
Color*
OK when
Power
Power is ok
green
On
100 Mbit
Ethernet Link is established
yellow
Blinking
Eth-Link
Ethernet Link activity
orange
On / blinking
System
hardware self diagnosis ok
green
On *
FPGA
FPGA self diagnosis ok
green
Blinking *
* the System- and FPGA-LED’s start blink synchronous, when CPU_Prog Pin is set active!
Note: when a 100 Hz Scanner head and a 50 Hz electronic system (and vice versa) were connected, the
electronic unit will not be able to connect to the Ethernet. The System-LED will blink significantly slower than
normal (<< 1 Hz). The normal blinking rhythm is approx. 2 Hz.
