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synchronization and control signals

 

41

, 

45

timer outputs

 

50

video sources supported

 

37

video timing information

 

36

MIL

 

13

, 

16

MIL-Lite

 

13

, 

16

, 

53

monochrome

 

35

, 

37

multiple boards

 

30

P

PCIe slot

 

14

, 

20

Processing FPGA

 

11

, 

55

–

56

Programmable Synchronization Generators

 

40

R

requirements

computer

 

14

RGB

 

11

, 

35

, 

37

rotary decoder

 

52

RS-232 compatible serial interfaces

 

12

S

SDRAM

defined

 

63

software supported

 

13

specifications

electrical

 

71

technical

 

68

synchronization and control signals

Matrox Radient eCL

 

41

, 

45

T

technical specifications

 

68

timer outputs

 

50

defined

 

65

transfer to/from the Host

buffer data

 

13

U

UART

 

12

, 

39

defined

 

65

V

vertical blanking period

 

65

video sources supported

Matrox Radient eCL

 

35

monochrome

 

35

, 

37

RGB

 

11

, 

35

, 

37

Summary of Contents for Radient eCL-DF

Page 1: ...Matrox Radient eCL Installation and Hardware Reference Manual no Y11144 101 0200 February 5 2014 ...

Page 2: ... technical support including without limitation damages or costs relating to the loss of profits business goodwill even if advised of the possibility of such damages In no event will Matrox and its suppliers liability exceed the amount paid by you for the product Because some jurisdictions do not allow the exclusion or limitation of liability for consequential or incidental damages the above limit...

Page 3: ...ls to get started 14 Inspecting the Matrox Radient eCL package 15 Standard items 15 Available separately 16 Handling components 16 Installation 16 Chapter 2 Hardware installation 19 Installing your Matrox Radient eCL board 20 Installing the cable adapter bracket 24 Connecting video sources 25 Chapter 3 Using multiple Matrox Radient eCL boards 29 Installation of multiple boards 30 Simultaneous imag...

Page 4: ...ARTs 39 PSGs 40 Camera control and auxiliary signals for Matrox Radient eCL DB and eCL QB 41 Camera control and auxiliary signals for Matrox Radient eCL SF and eCL DF 45 Specifications of the auxiliary and camera control signals 49 Timers 50 Trigger 51 Synchronization 52 Clock 52 Rotary decoder 52 User signals 53 Acquisition controller 54 Processing FPGA 55 Possible processing operations 55 FPGA c...

Page 5: ...x Radient eCL boards 73 Camera Link video input connectors 74 External auxiliary I O connectors 77 Appendix C Acknowledgments 87 UART copyright information 88 Appendix D Major revisions of Matrox Radient eCL boards 89 Major revisions of Matrox Radient eCL 90 Index Regulatory Compliance FCC Compliance Statement Industry Canada Compliance Statement EU Notice European Union Directive on Waste Electri...

Page 6: ......

Page 7: ...Chapter 1 Chapter 1 Introduction This chapter briefly describes the features of the Matrox Radient eCL boards as well as the software that can be used with the boards ...

Page 8: ...Matrox Radient eCL SF and eCL DF support acquiescing from Camera Link video sources in Medium or Full configuration with up to 10 taps eCL SF supports acquisition from one of these video sources whereas eCL DF supports two simultaneously Matrox Radient eCL supports power over Camera Link PoCL compliant video sources and Camera Link frequencies of 20 MHz to 85 MHz This manual uses the term Matrox R...

Page 9: ...0 MHz Host x8 PCIe bus MIL license fingerprint and Supplemental MIL license storage Matrox Radient eCL DB QB Up to 2 GB s Up to 1 GB Up to1 GB Up to 10 6 GB s Up to 10 6 GB s Total of up to 4 0 GB s write and up to 4 0 GB s read Color space converter pixel formatter Host Interface DMA Read DMA Write Up to 2 GB s Up to 2 GB s Up to 2 GB s Up to 2 GB s AC 0 AC 3 AC 2 AC 1 LVDS Aux In 2 LVDS Aux Out ...

Page 10: ...I Os 3 Auxiliary I O interface Acquisition Controller Memory Controller Optional Dedicated Processing Memory 4 or 8 MB 4 or 8 MB 4 or 8 MB 4 or 8 MB Altera Stratix III Processing FPGA customizable Processing Units QDR II SRAM 250 MHz Host x8 PCIe bus MIL license fingerprint and Supplemental MIL license storage Matrox Radient eCL SF DF Up to 2 GB s Up to 10 6 GB s Up to 10 6 GB s Total of up to 4 0...

Page 11: ...k of up to 133 MHz The operations performed on board are controlled using the Matrox Imaging Library MIL application development software Using MIL the processing units PUs of an FPGA configuration can be rearranged to perform the operations in the required sequence without having to necessarily generate a new FPGA configuration When the need arises Matrox s FPGA design services can be employed to...

Page 12: ...atter These can convert captured or processed data as it is being transferred to the Host They can convert 8 or 16 bit monochrome or 24 or 48 bit packed BGR data to monochrome packed BGR packed BGRa planar RGB or YUV YUYV format In addition they can flip crop or subsample data sent to the Host Auxiliary multi purpose signals These are non video signals that can support one or more functionalities ...

Page 13: ...isplay and archiving Image processing operations include point to point statistical spatial filtering morphological geometric transformation and FFT operations Analysis operations support calibration are performed with sub pixel accuracy and include pattern recognition normalized grayscale correlation and Geometric Model Finder blob analysis edge extraction and analysis measurement image registrat...

Page 14: ...uter chassis this slot need not be an electrical slot Processor with an Intel 32 bit or 64 bit architecture or equivalent A relatively up to date PCIe chipset The list of platforms that are known to be compatible with Matrox Radient eCL are available on the Matrox website under the board s PC compatibility list A proper power supply Refer to the Electrical specifications section in Appendix B Tech...

Page 15: ...your Matrox Radient eCL package when you first open it If something is missing or damaged contact your Matrox representative Standard items You should receive the following items The Matrox Radient eCL board depending on which was purchased If Matrox Radient eCL QB or eCL DF was purchased the appropriate expansion module will be installed on the main board Note that eCL DB and eCL SF are not upgra...

Page 16: ...und before you touch any electronic component In addition do not let your clothing come in contact with the circuit boards or components Warning Before you add or remove devices from your computer always turn off the power to your computer and all peripherals Installation The installation procedure consists of the following steps 1 Complete the hardware installation procedure described in Chapter ...

Page 17: ...upport This page provides answers to frequently asked questions as well as offers registered customers additional ways of obtaining support If your question is not addressed and you are currently registered with the MIL maintenance program you can contact technical support To do so you should first complete and submit the online Technical Support Request Form accessible from the above mentioned pa...

Page 18: ...18 Chapter 1 Introduction ...

Page 19: ...Chapter 2 Chapter 2 Hardware installation This chapter explains how to install your Matrox Radient eCL board in your computer ...

Page 20: ...hould be installed before you install your software Proceed with the following steps to install your board 1 Remove the cover from your computer refer to your computer s documentation for instructions 2 Check that you have an empty x8 or x16 PCIe slot in which to install your Matrox Radient eCL Note that you can also install Matrox Radient eCL in a x4 PCIe slot that has a mechanical x8 connector h...

Page 21: ...o its slot s connector the expansion module attaches only to the back of the computer s chassis If you need to install the cable adapter bracket of your Matrox Radient eCL board you need an additional slot This slot need not be adjacent to the Matrox Radient eCL board In addition the cable adapter bracket does not plug into the slot s connector it attaches only to the back of the computer s chassi...

Page 22: ...d damaging the board Some x16 PCIe slots have a connector with a retainer Matrox Radient eCL must not come into contact with the latch of this retainer The PCIe specification does not define appropriate keep out regions for the latch to provide any tolerance to tilting or rotation when inserting or removing add in boards in these connectors Therefore do not tilt the Matrox Radient eCL board backwa...

Page 23: ...dentally connecting the cables to the wrong connector can damage the board or your video source Pins 2 5 and pins 15 18 are output pins on the top connector 0 and 2 while they are input pins on the bottom connector 1 and 3 8 Turn on your computer When you boot your computer under Windows Windows Plug and Play system will detect a new Multimedia Video Device and you will be asked to assign it a dri...

Page 24: ...To do so position the cable so that the black wire is on the same side as the bracket of the Matrox Radient eCL board 3 Slide the bracket into the opening at the back of the selected slot 4 Anchor the bracket to the chassis using the screw that you removed in the previous section Note that the external auxiliary I O connectors on the cable adapter bracket are panel mount connectors So if you don t...

Page 25: ...iliary signals To access the signals of the internal auxiliary I O connectors you might have installed the cable adapter bracket It has the following connectors External auxiliary I O connector C and D panel mount DBHD 15 Each used to transmit receive the auxiliary signals Auxiliary I O connector D Auxiliary I O connector C Auxiliary I O connectors A and B Camera Link video input connectors 0 and ...

Page 26: ...onnector 0 Camera Link connector 1 Camera Link connector 2 Camera Link connector 3 eCL DB Video source 0 in Base configuration Video source 1 in Base configuration eCL QB Video source 0 in Base configuration Video source 1 in Base configuration Video source 2 in Base configuration Video source 3 in Base configuration eCL SF Video source 0 in Medium or Full configuration eCL DF Video source 0 in Me...

Page 27: ...u should use PoCL compliant Camera Link cables HDR or SDR Camera Link cables are not available from Matrox for possible sources see the Connectors on Matrox Radient eCL boards section in Appendix B Technical information If using both Camera Link connectors to connect to the same video source single Medium mode or single Full mode the cables you choose must be of the same type and length Otherwise ...

Page 28: ...28 Chapter 2 Hardware installation ...

Page 29: ...Chapter 3 Chapter 3 Using multiple Matrox Radient eCL boards This chapter explains how to use multiple Matrox Radient eCL boards ...

Page 30: ...ides simultaneously capturing images from multiple video sources attached to a Matrox Radient eCL board except eCL SF you can simultaneously capture images from video sources attached to different Matrox Radient eCL boards However the number of video sources from which you can simultaneously capture images is computer dependent The use of a high performance PCIe chipset is necessary to sustain PCI...

Page 31: ...Chapter 4 Chapter 4 Matrox Radient eCL hardware reference This chapter explains the architecture features and modes of the Matrox Radient eCL hardware ...

Page 32: ...ll video timing synchronization triggering timer and user input and output signals for the path MIL Lite uses the concept of a MIL digitizer to represent the acquisition path s with which to grab from one input source of the specified type When several MIL digitizers are allocated their device number along with their DCF identify if they represent the same path s but perhaps for a different input ...

Page 33: ...SRAM 250 MHz Host x8 PCIe bus MIL license fingerprint and Supplemental MIL license storage Matrox Radient eCL DB QB Up to 2 GB s Up to 1 GB Up to1 GB Up to 10 6 GB s Up to 10 6 GB s Total of up to 4 0 GB s write and up to 4 0 GB s read Color space converter pixel formatter Host Interface DMA Read DMA Write Up to 2 GB s Up to 2 GB s Up to 2 GB s Up to 2 GB s AC 0 AC 3 AC 2 AC 1 LVDS Aux In 2 LVDS A...

Page 34: ... 1 TTL Aux I Os 3 Auxiliary I O interface Acquisition Controller Memory Controller Optional Dedicated Processing Memory 4 or 8 MB 4 or 8 MB 4 or 8 MB 4 or 8 MB Altera Stratix III Processing FPGA customizable Processing Units QDR II SRAM 250 MHz Host x8 PCIe bus MIL license fingerprint and Supplemental MIL license storage Matrox Radient eCL SF DF Up to 2 GB s Up to 10 6 GB s Up to 10 6 GB s Total o...

Page 35: ...video sources Matrox Radient eCL also supports additional types of video sources including some time multiplexed video sources and 10 tap 8 bit video sources Matrox Radient eCL DB has two independent acquisition paths in dual Base mode and Matrox Radient eCL QB has four independent acquisition paths in quad Base mode Matrox Radient eCL SF has one acquisition path in single Full or single Medium mo...

Page 36: ...4 bits of video data when acquiring from Camera Link compliant video sources and up to 80 bits when acquiring from non standard video sources The video sources can be frame or line scan video sources Note that the acquisition paths in dual Base quad Base dual Medium and dual Full mode are completely independent and therefore the video sources do not need to be identical when running in these modes...

Page 37: ...rd One tap x 8 10 12 14 16 bit Two tap x 8 10 12 bit One tap 3 x 8 bit RGB Four tap 8 bit with time multiplexing Not Camera Link Standard Two tap 14 16 bit with time multiplexing Four tap x 10 12 bit with time multiplexing Video sources supported Camera Link Standard Four tap x 8 10 12 bit One tap 3 x 10 12 bit RGB Not Camera Link Standard 8 tap x 8 bit with time multiplexing using only 2 receiver...

Page 38: ...as in single Full mode it uses all three receivers Matrox Radient eCL DF has an additional three ChannelLink receivers that operate in the same manner as those on eCL SF permitting eCL DF to operate in dual Medium or dual Full mode For Matrox Radient eCL DB QB each ChannelLink receiver can receive up to 24 bits of video data and 4 bits of synchronization data from the video source as serialized da...

Page 39: ...xpansion is not always necessary For each acquisition path two LVDS pairs are used to transmit and receive asynchronous serial communication between the video source and the board These signals are handled by the Universal Asynchronous Receiver Transmitters UARTs For each acquisition path four camera control output signals are also available These are general purpose signals that are sent to the v...

Page 40: ...deo timing and synchronization signals The PSGs are also responsible for managing the camera control and auxiliary signals supported by the board These signals are configurable signals that can support one or several functions one of which is user defined the table in the next subsection identifies the functions to which the camera control and auxiliary signals can be defined The PSGs are also res...

Page 41: ...ink Connector 3 M_CC_IOn n 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 for M_DEVm m 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 Functionality A c q u i s i t i o n p a t h C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 Timer M_TIMERn 0 1 2 1 2 1 2 1 2 1 1 2 1 2 1 2 1 2 2 1 2 1 2 1 2 1 2 3 1 2 1 2 1 2 1 2 User output bit of Camera Link static user output register M_USER_BIT...

Page 42: ... IN 1 1 L V D S _ A U X _ IN 1 8 L V D S _ A U X _ IN 1 9 L V D S _ A U X _ IN 2 6 L V D S _ A U X _ IN 2 7 L V D S _ A U X _ O U T 7 L V D S _ A U X _ O U T 1 5 L V D S _ A U X _ O U T 2 3 L V D S _ A U X _ O U T 3 1 Timer M_TIMERn 0 1 2 1 2 1 1 2 1 2 2 1 2 1 2 3 1 2 1 2 Trigger controller affected by input signal 0 T0 T1 T2 T3 T0 T1 T2 T3 T0 T1 T2 T3 1 T2 T0 T1 T3 T0 T2 T1 T3 T0 T2 T1 T3 2 T0 T1...

Page 43: ...r M_CC_IOy for M_DEVz x 8 9 2 8 9 3 8 9 2 8 9 3 12 12 13 13 y 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 z 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 0 0 0 1 1 1 0 1 2 2 2 3 3 3 2 3 0 1 2 3 Auxiliary input signal or auxiliary I O signal set to input M _ A U X _ I O x A c q u i s i t i o n p a t h C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 T T L _ A U X _ IO _ 4 T T L...

Page 44: ...Link Connector 1 Camera Link Connector 2 Camera Link Connector 3 Aux I O Connector Aux I O Connector A C B D A C B D M_AUX_IOx or M_CC_IOy for M_DEVz x 8 9 2 8 9 3 8 9 2 8 9 3 12 12 13 13 y 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 z 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 0 0 0 1 1 1 0 1 2 2 2 3 3 3 2 3 0 1 2 3 Auxiliary input signal or auxiliary I O signal set to input M _ A U X _ I O x A c q u i s i t i o n p a ...

Page 45: ... ctrl Camera Link Connector 0 Camera Link Connector 2 Only available on Matrox Radient eCL DF M_CC_IOn n 1 2 3 4 1 2 3 4 for M_DEVm MIL constant where n and m correspond to the number in the row M_DEVm is the required device number of the digitizer MdigAlloc that you must use to access this signal m 0 0 0 0 1 1 1 1 Functionality A c q u i s i t i o n p a t h C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C...

Page 46: ... IN 1 0 L V D S _ A U X _ IN 1 1 L V D S _ A U X _ IN 1 8 L V D S _ A U X _ IN 1 9 L V D S _ A U X _ IN 2 6 L V D S _ A U X _ IN 2 7 L V D S _ A U X _ O U T 7 L V D S _ A U X _ O U T 2 3 Timer M_TIMERn 0 1 2 1 2 1 1 2 1 2 Trigger controller affected by input signal 0 T0 T1 T2 T3 T0 T1 T2 T3 T0 T1 T2 T3 1 T0 T1 T2 T3 T0 T1 T2 T3 T0 T1 T2 T3 Timer clock input 0 0 1 0 Bit of quadrature input 0 0 1 1 ...

Page 47: ... M_AUX_IOx or M_CC_IOy for M_DEVz x 8 9 2 3 8 9 2 3 12 13 y 1 2 3 4 1 2 3 4 z 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 Auxiliary input signal or auxiliary I O signal set to input M _ A U X _ I O x A c q u i s i t i o n p a t h C C 1 C C 2 C C 3 C C 4 C C 1 C C 2 C C 3 C C 4 T T L _ A U X _ IO _ 4 T T L _ A U X _ IO _ 5 T T L _ A U X _ IO _ 6 T T L _ A U X _ IO _ 1 4 T T L _ A U X _ IO _ 2 0 T T L _ A U...

Page 48: ... this signal LVDS cam ctrl TTL Aux I O LVDS Aux Out Camera Link Connector 0 Camera Link Connector 2 Aux I O Connector Aux I O Connector A C B D A B M_AUX_IOx or M_CC_IOy for M_DEVz x 8 9 2 3 8 9 2 3 12 13 y 1 2 3 4 1 2 3 4 z 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 Auxiliary input signal or auxiliary I O signal set to input M _ A U X _ I O x A c q u i s i t i o n p a t h C C 1 C C 2 C C 3 C C 4 C C 1 C...

Page 49: ... be between 4 71 V and 9 165 V for logic high and between 5 0 V and 0 8V for logic low You can set the direction of a bidirectional auxiliary I O signal using the MIL Lite function MdigControl with M_IO_MODE You specify the purpose of the camera control and auxiliary signals in the DCF with Matrox Intellicam You can then program these signals using the MIL Lite function MdigControl with M_IO M_TRI...

Page 50: ... s clock generator which can generate a single clock with a programmable frequency of 0 63 to 85 MHz Timers can only use the clock generator of their own PSG A clock from an external source In this case you must define the appropriate auxiliary input signal as a timer clock input the timer clock input signal must meet the electrical specification of the auxiliary signal The same timer clock input ...

Page 51: ...O10 Trigger Controller 0 MUX TTL_AUX_IO_5 M_AUX_IO9 OPTO_AUX_IN1 M_AUX_IO7 LVDS_AUX_IN3 M_AUX_IO11 Trigger Controller 1 MUX TTL_AUX_IO_6 M_AUX_IO2 OPTO_AUX_IN8 M_AUX_IO0 LVDS_AUX_IN10 M_AUX_IO4 Trigger Controller 2 MUX TTL_AUX_IO_14 M_AUX_IO3 OPTO_AUX_IN9 M_AUX_IO1 LVDS_AUX_IN11 M_AUX_IO5 Trigger Controller 1 MUX TTL_AUX_IO_22 M 2 _AUX_IO OPTO_AUX_IN24 M 0 _AUX_IO Trigger Controller 2 Trigger Cont...

Page 52: ...ecoder quadrature decoder A rotary decoder is used to decode quadrature input received from a rotary encoder with quadrature output A rotary encoder is a device that provides information about the position and direction of a rotating shaft for example that of a conveyor belt The encoder outputs a two bit code also known as Gray code on two pairs of LVDS wires for each change in position of the rot...

Page 53: ...o you set the state on off of a bit in a user settable register static user output register When the bit is on its associated auxiliary output signal will be high when it is off the auxiliary output signal will be low This bit is referred to as a user bit Your application can also act upon and interpret the state of an auxiliary input signal or I O signal set to input The state of an auxiliary inp...

Page 54: ...n single Medium or single Full mode per acquisition path However when grabbing 10 taps the memory controller can only write to one memory region This means that each of the 10 taps must carry one of 10 sequential pixels Note that the width of each region must be a multiple of the number of taps in that region To establish the number of non sequential memory regions to which your video source must ...

Page 55: ... FPGA processing can be stored in main on board memory or streamed to the Host The maximum bandwidth for image streamed directly to from Host memory is 1 Gbytes sec while it is 2 Gbytes sec for images streamed to from on board memory Possible processing operations To use the Processing FPGA you must configure it with an FPGA configuration that defines the appropriate functionality An FPGA configur...

Page 56: ...memory is optional and is used to store intermediate data while the Processing FPGA performs operations As Processing FPGA memory Matrox Radient eCL uses 4 banks of QDR II SRAM that total 16 or 32 Mbytes of memory and have a total transfer rate of up to 4 0 Gbytes sec in each direction Use the MIL Lite functions MbufAlloc1d MbufAlloc2d and MbufAllocColor to allocate buffers explicitly in this memo...

Page 57: ...adient eCL can exchange data with the Host at a peak transfer rate of up to 2 Gbytes sec but can sustain a transfer rate of up to 1750 Mbytes sec Optimum conditions include using the board in a PCIe slot with 8 active lanes using a 256 byte payload DMA read and write performances are chipset and computer dependent and are slightly affected by the image size and alignment in Host memory frame start...

Page 58: ...ge data can be converted as follows The equations for the YUV16 conversion are described in the following table The value of depth is either 8 or 16 when converting BGR24 or BGR48 data respectively Note that while performing BGR48 to YUV color space conversion the operations are carried out on 16 bit data then each resulting YUV component is bit shifted right by 8 bits depth 8 where the value of d...

Page 59: ... of the source image to the bit depth and color format of the destination buffer The DCF establishes the format of the source while the destination grab buffer establishes the output format Grabbing into on board buffers When grabbing into an on board buffer only acquisition controller formatting operations are supported these arehorizontal and vertical flipping and if grabbing from a line scan vi...

Page 60: ...60 Chapter 4 Matrox Radient eCL hardware reference ...

Page 61: ...Appendix A Appendix A Glossary This appendix defines some of the specialized terms used in the Matrox Radient eCL documentation ...

Page 62: ...beginning of the new line or frame The portion of a video signal after the end of a line and before the beginning of a new line is known as the horizontal blanking period The portion of a video signal after the end of a frame and before the beginning of a new frame is known as the vertical blanking period Contiguous memory A block of memory occupying a single unbroken series of addresses Data vali...

Page 63: ...range can be any range within these values Exposure time Refers to the period during which the image sensor of a video source is exposed to light As the length of this period increases so does the image brightness FPGA Field programmable gate array An array of digital electronic components that can be programmed to perform a specific function An FPGA can contain logic gates lookup tables flip flop...

Page 64: ...nal The signal that indicates the start and end of a line row See also data valid and frame valid synchronization signal LVDS Low voltage differential signalling LVDS offers a general purpose high bandwidth interface standard for serial and parallel data interfaces that require increased bandwidth at high speed with low noise and power consumption Real time processing The processing of an image as...

Page 65: ...use it has independent read and write ports Timer output The signal generated by one of the programmable timers of the frame grabber The timer output can be used to control external hardware For example it can be fed to the video source to control its exposure time or used to fire a strobe light UART Universal Asynchronous Receiver Transmitter A component that handles asynchronous communication th...

Page 66: ...66 Appendix A Glossary ...

Page 67: ...Appendix B Appendix B Technical information This appendix contains information that might be useful when installing your Matrox Radient eCL board ...

Page 68: ...fice the Matrox web site or the Matrox Imaging Customer Support Group at headquarters before using a specific computer Technical features of Matrox Radient eCL Matrox Radient eCL DB has two independent acquisition paths Matrox Radient eCL QB has four independent acquisition paths Each acquisition path supports a video source in the Camera Link Base configuration Matrox Radient eCL SF has a single ...

Page 69: ...ng data transfer to Host Can convert captured or processed 8 or 16 bit monochrome or 24 or 48 bit packed BGR data to monochrome packed BGR packed BGRa planar RGB or YUV YUYV format Supports line reversal and frame reversal during acquisition Can only perform frame reversal during data transfer to Host Can crop ROI capture acquired data or subsample it by integer subsampling factors of 1 to 16 Has ...

Page 70: ... per acquisition path One LVDS auxiliary output signal timer output or user output per acquisition path Two LVDS auxiliary input signals trigger input timer clock input quadrature input or user input per acquisition path Two opto isolated auxiliary input signals trigger input or user input per acquisition path See the Camera control and auxiliary signals for Matrox Radient eCL DB and eCL QB and Ca...

Page 71: ...100 Ohm 250 mV min to 450 mV max Offset voltage common mode 1 125 V min to 1 375 V max Propagation delay 2 8 ns max Input signals in TTL format No series termination Pulled up to 3 3 V with 4 716 k ohm Clamped to 0 7 V to 5 7 V Input current 5 μA max Input voltage low of 0 8 V max high of 2 0 V min Output signals in TTL format 27 Ohm series termination High level output current 32 mA max Low level...

Page 72: ...ensions of Matrox Radient eCL QB and eCL DF 16 76 L x 11 12 H x 3 903 W cm 6 6 x 4 376 x 1 537 from bottom edge of goldfinger to top edge of board Ventilation 200 LFM between boards Minimum maximum ambient operating temperature 0 C to55 C 32 F to 131 F Minimum maximum storage temperature 40 C to 75 C 40 F to 167 F Operating relative humidity up to 95 relative humidity non condensing Storage humidi...

Page 73: ...adapter bracket there are two external auxiliary I O connectors DBHD 15 these allow you to access the signals of the internal auxiliary I O connector from outside the computer enclosure Internal auxiliary I O connector Auxiliary I O connector A Camera Link video input connector 0 Camera Link video input connector 1 Reserved connectors Auxiliary I O connector D Auxiliary I O connector C Auxiliary I...

Page 74: ... of Camera Link video input connectors and their pinout depends on the version of Matrox Radient eCL and the configuration The pinout of these connectors follows the Camera Link standard Matrox Radient eCL DB and eCL QB On Matrox Radient eCL DB there are two Camera Link connectors whereas on Matrox Radient eCL QB there are four Camera Link connectors Each Camera Link connector on Matrox Radient eC...

Page 75: ...tput M_USER_BIT_CC_IO0 M_USER_BIT_CC_IO1onM_DEVn VSYNC HSYNC clock output or rerouting of specific auxiliary input signals 17 4 CC2 M_CC_IO2 Camera control output 2 for acquisition path n which supports timer output M_TIMER1 M_TIMER2 on M_DEVn user output M_USER_BIT_CC_IO0 M_USER_BIT_CC_IO1onM_DEVn VSYNC HSYNC clock output or rerouting of specific auxiliary input signals 20 7 SerTC Serial port to ...

Page 76: ...connecting a video source in Full configuration ensure that you are connecting its cables to the appropriate connector Accidentally connecting the cables to the wrong connector can damage the board or your video source Pins 2 5 and pins 15 18 are output pins on the top connector 0 and 2 while they are input pins on the bottom connector 1 and 3 Pin Hardware signal name Description 1 GND or PWR_OUT ...

Page 77: ...d the cable adapter bracket are high density D subminiature 15 pin DBHD 15 male connectors on the cable adapter bracket the connectors are panel mount connectors The external auxiliary I O connectors are used to transmit receive auxiliary signals The auxiliary I O connectors on Matrox Radient eCL are not compatible with display devices Connecting one of the DBHD 15 connectors on Matrox Radient eCL...

Page 78: ...ch supports trigger input trigger controller 0 on acq path 0 user input or quadrature input bit 0 6 8 LVDS_AUX_IN3 M_AUX_IO11 M_DEV0 LVDS auxiliary signal input for acquisition path 0 which supports user input trigger input trigger controller 1 on acq path 0 timer clock input or quadrature input bit 1 7 GND N A N A Ground 10 GND N A N A Ground 12 11 OPTO_AUX_IN1 M_AUX_IO7 M_DEV0 Opto isolated auxi...

Page 79: ... acquisition path 2 which supports trigger input trigger controller0 on acq path2 user input or quadrature input bit 0 6 8 LVDS_AUX_IN19 M_AUX_IO11 M_DEV2 LVDS auxiliary signal input for acquisition path 2 which supports user input trigger input trigger controller 1 on acq path 2 timer clock input or quadrature input bit 1 7 GND N A N A Ground 10 GND N A N A Ground 12 11 OPTO_AUX_IN17 M_AUX_IO7 M_...

Page 80: ...on acq path 1 or userinput and dedicated to acquisition path1 forquadratureinput bit 0 6 8 LVDS_AUX_IN11 M_AUX_IO5 M_DEV0 M_DEV1 LVDS auxiliary signal input shared between acquisition paths 0 and 1 for trigger input trigger controller 1 or 3 on acq path 1 3 on acq path 0 or userinput and dedicated to acquisition path1 fortimer clock input or quadrature input bit 1 7 GND N A N A Ground 10 GND N A N...

Page 81: ... path 2 or user input and dedicated to acquisition path 3 for quadrature input bit 0 6 8 LVDS_AUX_IN27 M_AUX_IO5 M_DEV2 M_DEV3 LVDS auxiliary signal input shared between acquisition paths 2 and 3 for trigger input trigger controller 1 or 3 on acq path 3 3 on acq path 2 or user input and dedicated to acquisition path 3 fortimer clock input or quadrature input bit 1 7 GND N A N A Ground 10 GND N A N...

Page 82: ...cquisition path 0 which supports trigger input trigger controller 0 on acq path 0 user input or quadrature input bit 0 6 8 LVDS_AUX_IN3 M_AUX_IO11 M_DEV0 LVDS auxiliary signal input for acquisition path 0 which supports user input trigger input trigger controller 1 on acq path 0 timer clock input or quadrature input bit 1 7 GND N A N A Ground 10 GND N A N A Ground 12 11 OPTO_AUX_IN1 M_AUX_IO7 M_DE...

Page 83: ...rigger input trigger controller0 on acq path1 user input or quadrature input bit 0 6 8 LVDS_AUX_IN19 M_AUX_IO11 M_DEV1 LVDS auxiliary signal input for acquisition path 1 which supports user input trigger input trigger controller 1 on acq path 1 timer clock input or quadrature input bit 1 7 GND N A N A Ground 10 GND N A N A Ground 12 11 OPTO_AUX_IN17 M_AUX_IO7 M_DEV1 Opto isolated auxiliary signal ...

Page 84: ...y signal input for acquisition path 0 which supports trigger input trigger controller 3 on acq path 0 or user input 7 GND N A N A Ground 10 GND N A N A Ground 12 11 OPTO_AUX_IN9 M_AUX_IO1 M_DEV0 Opto isolated auxiliary signal input for acquisition path 0 which supports trigger input trigger controller 3 on acq path 0 or user input 13 RESERVED Reserved Do not connect 14 RESERVED Reserved Do not con...

Page 85: ...X_IO5 M_DEV1 LVDS auxiliary signal input for acquisition path 1 which supports trigger input trigger controller 3 on acq path 1 or user input 7 GND N A N A Ground 10 GND N A N A Ground 12 11 OPTO_AUX_IN25 M_AUX_IO1 M_DEV1 Opto isolated auxiliary signal input for acquisition path 1 which supports trigger input trigger controller 3 on acq path 1 or user input 13 RESERVED Reserved Do not connect 14 R...

Page 86: ...86 Appendix B Technical information ...

Page 87: ...Appendix C Appendix C Acknowledgments This appendix lists the copyright information regarding third party material used to implement components on the Matrox Radient eCL board ...

Page 88: ...Neither the name of the author nor the names of other contributors may be used to endorse or promote products derived from this software without specific prior written permission THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS AND ANY EXPRESS OR IMPLIED WARRANTIES INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE A...

Page 89: ...Appendix D Appendix D Major revisions of Matrox Radient eCL boards This appendix lists the major revisions of the Matrox Radient eCL boards ...

Page 90: ...ri improved power sequencing 201 Added threadlocking adhesive on mini Camera Link connectors thumbscrews 202 Fixed the PMB to avoid a potential issue powering up the clock generator RAD2GDF150400 RAD2GDF200432 RAD2GQB150400 RAD2GQB200432 000 First shipping version 001 Changed inductor value on 5V switcher supply 002 Replaced pull down by pull up on TTL auxiliary I O inputs 003 No functional change...

Page 91: ...F defined 62 see digitizer configuration format digitizer configuration format 32 digitizer MIL 32 documentation conventions 8 E electrical specifications 71 external auxiliary I O connector 0 77 F flip 54 frame defined 63 frame valid synchronization signal defined 63 G global information 68 Gray code 52 H hardware reference 32 horizontal blanking period defined 64 I independent acquisition path 3...

Page 92: ...requirements computer 14 RGB 11 35 37 rotary decoder 52 RS 232 compatible serial interfaces 12 S SDRAM defined 63 software supported 13 specifications electrical 71 technical 68 synchronization and control signals Matrox Radient eCL 41 45 T technical specifications 68 timer outputs 50 defined 65 transfer to from the Host buffer data 13 U UART 12 39 defined 65 V vertical blanking period 65 video so...

Page 93: ...n accordance with the instruction manual may cause harmful interference to radio communications Operation of these devices in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his her own expense Industry Canada Compliance Statement These digital apparatuses do not exceed the Class A limits for radio noise emission fro...

Page 94: ...Electrical and Electronic Equipment WEEE Europe English European user s information Directive on Waste Electrical and Electronic Equipment WEEE Please refer to the Matrox Web site www matrox com environment weee for recycling information Français Informations aux utilisateurs Européens Règlementation des déchets d équipements électriques et électroniques DEEE Se référer au site Web de Matrox www m...

Page 95: ...Limited warranty Refer to the warranty statement that came with your product ...

Page 96: ......

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