Microcontroller Interface Timings
9-11
9.4.3 External Data Write Cycle
Figure 9.7
External Data Write Waveforms
Table 9.16
External Data Write Timings
Symbol
Parameter
Min
Max
Units
t
13
ALE to WR/ = Minimum delay from ALE falling to WR/
falling
50
–
ns
t
14
WR/ pulse width = Minimum time WR/ is low
50
–
ns
t
15
Data setup to WR/ = Minimum time data is valid prior to
WR/ rising
50
–
ns
t
16
Data hold after WR/ = Minimum time data is valid after WR/
rising
20
–
ns
t
6
Address Valid to ALE Falling = Minimum setup time for
A[15:8] and AD[7:0] to ALE falling
20
–
ns
t
7
ALE Falling to Lower Address Valid = Maximum delay from
ALE falling to AD[7:0] valid
–
10
ns
ALE
PSEN/
WR/
AD[7:0]
A[7:0]
t
14
ADDR
ADDR
ADDR
A[15:8]
t
13
t
6
t
7
ADDR
ADDR
t
16
DATA
ADDR
t
15
Summary of Contents for Symbios SYM53C040
Page 12: ...xii Preface...
Page 90: ...4 18 SCSI and DMA Registers...
Page 98: ...5 8 SFF 8067 Registers...
Page 110: ...6 12 Two Wire Serial Registers...
Page 126: ...7 16 Miscellaneous Registers...
Page 160: ...8 34 System Registers...
Page 184: ...9 24 Electrical Characteristics...
Page 194: ...A 10 Register Summary...
Page 214: ......