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6-4
Two-Wire Serial Registers
Examples:
1.
A 40 MHz input clock and a maximum 400 kHz SCL output would
require D1*D0 to be greater than 100. A best fit would be for D1 to
be 32 and D0 to be 4. The value written into the register would be
0x15. This will yield a 312.5 kHz SCL output clock speed.
2.
A 40 MHz input clock and a maximum 100 kHz SCL output would
require D1*D0 to be greater than 400. A best fit would be for D1 to
be 128 and D0 to be 4. The value written into the register would be
0x16. This would yield a 78.125 kHz SCL output clock speed.
Register: 0xFD00/0xFD02
Data (ES0, ES1, ES2 = 100)
Read/Write
D[7:0]
Data
[7:0]
This register is used for data transmission to and
reception from the Two-Wire Serial bus. During a transmit
operation, the data is sent out onto the Two-Wire Serial
bus after writing this register. During a receive operation,
ICF2
ICF1
ICF0
D0
0
x
x
2
1
0
0
3
1
0
1
4
1
1
0
5
1
1
1
8
ASF1
ASF0
D1
0
0
16
0
1
32
1
0
128
1
1
1024
7
6
5
4
3
2
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Defaults:
0
0
0
0
0
0
0
0
Summary of Contents for Symbios SYM53C040
Page 12: ...xii Preface...
Page 90: ...4 18 SCSI and DMA Registers...
Page 98: ...5 8 SFF 8067 Registers...
Page 110: ...6 12 Two Wire Serial Registers...
Page 126: ...7 16 Miscellaneous Registers...
Page 160: ...8 34 System Registers...
Page 184: ...9 24 Electrical Characteristics...
Page 194: ...A 10 Register Summary...
Page 214: ......