![LSI Symbios SYM53C040 Technical Manual Download Page 107](http://html1.mh-extra.com/html/lsi/symbios-sym53c040/symbios-sym53c040_technical-manual_1944094107.webp)
6-9
matches the programmed
register (
) setting. When this bit is
cleared, the address matches the general call address.
LAB
Lost Arbitration Bit
1
In a multiple master environment, if the SYM53C040
loses arbitration to another master on the bus, then it will
relinquish control to the other master and set this bit. It
should be noted that if two masters are simultaneously
active on the Data register interface requesting the exact
same operation, then the two masters will not observe
each other and a parallel operation has occurred.
BB_N
Bus Busy
0
When active (logic 0), this active low bit signifies that the
Data register interface is currently in use and access is
not possible. It is activated upon detection of a start
condition and deactivated upon detection of a stop
condition.
Register: 0xFD04
Miscellaneous
Read Only
R
Reserved
[7:1]
CKSUM
Checksum Error
0
This bit is set if an error was detected when checking the
checksum value after download.
7
1
0
R
CKSUM
Defaults:
0
0
0
0
0
0
0
0
Summary of Contents for Symbios SYM53C040
Page 12: ...xii Preface...
Page 90: ...4 18 SCSI and DMA Registers...
Page 98: ...5 8 SFF 8067 Registers...
Page 110: ...6 12 Two Wire Serial Registers...
Page 126: ...7 16 Miscellaneous Registers...
Page 160: ...8 34 System Registers...
Page 184: ...9 24 Electrical Characteristics...
Page 194: ...A 10 Register Summary...
Page 214: ......